Field-effect transistor, semiconductor device including the field-effect transistor, and method of producing semiconductor device

A junction pseudomorphic high-electron-mobility transistor comprising:

• a semi-insulating substrate;
• a channel layer formed on the semi-insulating substrate by epitaxial growth;
• a spacer layer formed on the channel layer by epitaxial growth;
• a doping layer formed on the spacer layer by epitaxial growth;
• an n-type barrier layer formed on the doping layer by epitaxial growth;
• a source electrode;
• a drain electrode;
• a gate electrode, the electrodes at approximately the same height on the barrier layer;
• a buried gate region in the barrier layer and in which an impurity is doped, the buried gate region being disposed under the gate electrode;
• and
• a slit in the barrier layer, the slit located between the buried gate region and the drain electrode and filled with an insulating material,
• wherein,
• a width of the buried gate region relative to a direction between the source and drain electrodes is less than a width of the gate electrode, and
• the slit extends from the surface of the barrier layer towards the doping layer to a depth of between 30% to 70% of the thickness of the barrier layer without contacting the doping layer, the depth of the slit extending into the barrier layer at approximately the same amount or more than a depth of the buried gate region.

A semiconductor device comprising:

• a junction pseudomorphic high-electron-mobility transistor including
• a semi-insulating substrate;
• a doping layer located on the substrate;
• a n-type barrier layer on said doping layer;
• a source electrode, a drain electrode, a gate electrode on said barrier layer, the electrodes being provided at approximately the same distance from the semi-insulating substrate;
• a buried gate region under the gate electrode and in which an impurity is doped, the buried gate region being formed in the barrier layer;
• and
• the transistor includes a slit in the barrier layer, the slit located between the buried gate region and the drain electrode filled with an insulating material,
• wherein,
• the width of the buried gate region relative to a direction between the source and drain electrodes is less than the width of the gate electrode, and
• the slit extends from the surface of the n-type barrier layer towards the doping layer at a depth of between 30% to 70% of the thickness of the n-type barrier layer without contacting the doping layer, the depth of the slit extending at approximately the same amount or more than a depth of the buried gate region.

A semiconductor device comprising:

• a junction pseudomorphic high-electron-mobility transistor including
• a semi-insulating substrate;
• a channel layer formed on the semi-insulating substrate by epitaxial growth;
• a spacer layer formed on the channel layer by epitaxial growth;
• a doping layer formed on the spacer layer by epitaxial growth;
• an n-type barrier layer formed on the doping layer by epitaxial growth;
• a source electrode, a drain electrode, a gate electrode on the barrier layer, the electrodes being provided at approximately the same distance from the barrier layer;
• and
• a buried gate region in the barrier layer and in which an impurity is doped, the buried gate region being disposed under the gate electrode;
• and
• a slit in the barrier layer, the slit located between the buried gate region and the drain electrode filled with insulating material,
• wherein,
• the width of the buried gate region relative to a direction between the source and drain electrodes is less than the width of the gate electrode, and
• the slit extends from the surface of the n-type barrier layer towards the doping layer at a depth of between 30% to 70% of the thickness of the n-type barrier layer without contacting the doping layer, the depth of the slit extending at approximately the same amount or more than a depth of the buried gate region.

A method of producing a semiconductor device comprising the steps of:

• forming a doping layer on a semi-insulating substrate;
• forming an n-type semiconductor layer on the doping layer;
• forming a slit in the n-type semiconductor layer, the slit located between the buried gate region and a drain electrode filled with insulating material;
• forming a buried gate region doped with an impurity in the n-type semiconductor layer;
• forming a gate electrode on the buried gate region;
• and
• forming a source electrode and a drain electrode at approximately the same height as the gate electrode on the n-type semiconductor layer, thereby forming a junction pseudomorphic high-electron-mobility transistor,
• wherein,
• the width of the buried gate region relative to a direction between the source and drain electrodes is less than the width of the gate electrode, and
• the slit extends from the surface of the n-type semiconductor layer towards the doping layer at a depth of between 30% to 70% of the thickness of the n-type semiconductor layer without contacting the doping layer, the depth of the slit extending at approximately the same amount or more than a depth of the buried gate region.