Apparatus and methods for precompiling program sequences processing for wafer processing
AssigneeNovellus Systems, Inc.
InventorsJaideep Jain, Qiang Zhou, Steve Kleinke
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AssigneeNovellus Systems, Inc.
InventorsJaideep Jain, Qiang Zhou, Steve Kleinke
Estimating the term…
Disclosed are apparatus and methods for embodiments for efficiently and flexibly controlling hardware devices in a semiconductor processing system are provided for use in a distributed control arrangement. In general, the distributed arrangement includes at least one upper-level controller that is configurable with a computer program sequence of instructions for controlling one or more hardware devices of a processing tool. The hardware devices are controlled through one or more lower-level controllers. Prior to execution of the program sequence of the upper-level controller, at least one instruction of this program is pre-compiled so as to translate the instruction for execution by a selected lower-level controller and to add an at least one interlock check to such pre-compiled instruction and make the translated instruction accessible to at least one lower-level controller. The interlock check specifies one or more condition(s) for the selected lower-level controller to execute the pre-compiled instruction. Any number of instructions of the upper-level controller may be translated for use by any number of selected lower-level controllers, where some of the translated instructions include one or more interlock checks.
A method of controlling a plurality of hardware devices of a semiconductor processing system, the method comprising:
A system for controlling a plurality of hardware devices of a semiconductor processing system, the system comprising:
A method of controlling a hardware device of a semiconductor processing system, the method comprising:
A lower level controller comprising one or more processors and one or more memory, wherein at least one of the processors and memory are adapted for:
Dependencies are inferred from the claim text.