Array substrate and display panel having the same

A display panel comprising:

• an array substrate including:
• a thin-film transistor layer including:
• a gate line;
• a data line disposed substantially perpendicular to the gate line;
• and
• a switching element connected to the gate line and the data line;
• a storage line disposed on substantially a same layer as the gate line;
• a gate insulation layer disposed on the gate line and the storage line;
• a passivation layer disposed on the thin-film transistor layer;
• a shielding electrode disposed on the gate insulation layer;
• and
• an insulation layer disposed on the shielding electrode;
• and
• a pixel electrode including a micro-slit pattern, the pixel electrode being disposed on the second insulation layer and electrically connected to the switching element,
• wherein the shielding electrode is vertically aligned with the data line and the shielding electrode blocks an electromagnetic fringe field of the data line from effecting the pixel electrode;
• an opposite substrate coupled to the array substrate, the opposite substrate including a common electrode disposed substantially opposite to the pixel electrode;
• and
• a liquid crystal layer interposed between the opposite substrate and the array substrate.

A method of manufacturing an array substrate, the method comprising:

• forming a thin-film transistor layer, the forming of a thin-film transistor comprising:
• providing a gate line;
• disposing a data line substantially perpendicular to the gate line;
• and
• connecting a switching element to the gate line and the data line;
• disposing a gate insulation layer on the gate line;
• disposing a passivation layer on the thin-film transistor layer;
• disposing a shielding electrode on the passivation layer;
• disposing an insulation layer on the shielding electrode;
• and
• disposing a pixel electrode including a micro-slit pattern on the insulation layer and electrically connecting the pixel electrode to the switching element;
• wherein the shielding electrode is vertically aligned with the data line and the shielding electrode blocks an electromagnetic fringe field of the data line from effecting the pixel electrode.