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US 8,076,760 B2Granted
Semiconductor fuse arrangements
AssigneeMicron Technology, Inc.
InventorH. Montgomery Manning
Life of this patent
Estimating the term…
Abstract
The invention includes semiconductor fuse arrangements containing an electrically conductive plate over and in electrical contact with a plurality of electrically conductive links. Each of the links contacts the electrically conductive plate as a separate region relative to the other links, and the region where a link makes contact to the electrically conductive plate is a fuse. The invention also includes methods of forming semiconductor fuse arrangements.
Claims20
A semiconductor fuse arrangement, comprising:
- a semiconductor substrate;
- three or more electrically conductive interconnects over the semiconductor substrate;
- three or more electrically conductive links in electrical connection with the electrically conductive interconnects;
- and
- an electrically conductive plate in direct physical contact with the three or more electrically conductive links and in electrical connection with the three or more electrically conductive interconnects, each of the three or more links contacting the electrically conductive plate in a different region relative to one another, the regions where the links make contact with the electrically conductive plate being fuses.
2 more elements
A semiconductor fuse arrangement, comprising:
- a semiconductor substrate;
- a plurality of electrically conductive interconnects having contact surfaces at or beneath a first elevational level relative to the substrate, the substrate being below the first elevational level;
- a plurality of electrically conductive links extending upwardly from the contact surfaces of the electrically conductive interconnects;
- and
- an electrically conductive plate in direct physical contact with the links and in electrical connection with the interconnects, the conductive plate being at a second elevational level above the first elevational level, each of the links of the plurality contacting the electrically conductive plate in a different region relative to one another, the regions where the links make contact with the electrically conductive plate being fuses and wherein the interconnects are not electrically connected to each other except via the plate.
2 more elements
A semiconductor fuse arrangement, comprising:
- a semiconductor substrate;
- a plurality of electrically conductive interconnects having contact surfaces at or beneath a first elevational level relative to the substrate, the substrate being below the first elevational level;
- a plurality of electrically conductive links in electrical connection with the electrically conductive interconnects;
- and
- an electrically conductive plate in direct physical contact with the links and in electrical connection with the interconnects, the conductive plate being at a second elevational level above the first elevational level, each of the links of the plurality contacting the electrically conductive plate in a different region relative to one another, the regions where the links make contact to the electrically conductive plate being fuses wherein the fuses are configured so that when one of the fuses is blown without blowing the other fuses, the plate remains electrically connected to the interconnects associated with the non-blown fuses.
2 more elements
Dependencies are inferred from the claim text.