Semiconductor circuit including electrostatic discharge circuit having protection element and trigger transistor
AssigneeRenesas Electronics Corporation
InventorYasuyuki Morishita
Life of this patent
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Abstract
A semiconductor circuit includes, a first pad for a first power source, a second pad for a second power source, a third pad for an input/output signal, a protection element arranged between the third pad and the second pad; and a transistor functioning as a trigger element for use in flowing a trigger current to the protection element. The transistor includes a gate and a backgate being connected to the first pad and is connected to the protection element such that a source potential of the transistor becomes lower than a potential of the third pad, based on a voltage drop caused by the protection element, when potentials of the first pad and the third pad are kept at a power supply voltage level.
Claims13
A semiconductor circuit, comprising:
- a first pad for a first power source;
- a second pad for a second power source;
- a third pad for an input/output signal;
- a silicon controlled rectifier (SCR) arranged between the third pad and the second pad;
- and
- a transistor functioning as a trigger element to flow a trigger current to a gate of the SCR, the transistor including a gate and a backgate being connected to the first pad,
- wherein an anode of the SCR is connected to the third pad,
- wherein a cathode of the SCR is connected to the second pad,
- wherein the gate of the SCR is connected to the source of the transistor,
- wherein the SCR comprises:
- a member of a P-type substrate or a P-well;
- a first P+ region formed in the member and connected to the second pad;
- a first N+ region formed in the member and connected to the second pad;
- an N-well formed in the P- type substrate or adjacent to the P-well;
- a second P+ region formed in the N-well and connected to the third pad;
- and
- a second N+ region formed in the N-well and connected to the source of the transistor, and
- wherein the first N+ region and the second P+ region are formed adjacent to each other and are formed between the first P+ region and the second N+ region.
Dependencies are inferred from the claim text.