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US 8,043,934 B2Granted
Methods of use and formation of a lateral bipolar transistor with counter-doped implant regions under collector and/or emitter regions
AssigneeInfineon Technologies AG
InventorsJens Schneider, Martin Wendel
Life of this patent
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Abstract
A method for protecting a semiconductor circuit from electrostatic discharge is disclosed. An electrostatic discharge is received at a node. Current created by the electrostatic discharge is directed vertically into a semiconductor body, laterally through the semiconductor and beneath a trench isolation region so that the current flows in a direction parallel to an upper surface of the semiconductor body, and to a reference supply node. The reference supply node being formed in a conductive layer disposed over the upper surface of the semiconductor body.
Claims28
A method for protecting a semiconductor circuit from electrostatic discharge, the comprising:
- receiving an electrostatic discharge at a node;
- directing current created by the electrostatic discharge vertically into a semiconductor body;
- directing the current laterally through the semiconductor and beneath a first isolation region so that the current flows in a direction parallel to an upper surface of the semiconductor body;
- and
- directing the current to a reference supply node, the reference supply node being formed in a conductive layer disposed over the upper surface of the semiconductor body, wherein the semiconductor circuit is protected by a protection device that comprises:
- a first doped region of a second conductivity type disposed at an upper surface of the semiconductor body, the semiconductor body having a first conductivity type that is different than the second conductivity type;
- a second doped region of the second conductivity type disposed at the upper surface of the semiconductor body, wherein the first isolation region is disposed within the semiconductor body between the first doped region and the second doped region;
- a third doped region of the first conductivity type disposed within the semiconductor body beneath the first doped region;
- a fourth doped region of the first conductivity type disposed at the upper surface of the semiconductor body;
- a second isolation region disposed within the semiconductor body between the second doped region and the fourth doped region;
- a fifth doped region of the first conductivity type disposed at the upper surface of the semiconductor body;
- and
- a third isolation region disposed within the semiconductor body between the first doped region and the fifth doped region, wherein the first isolation region physically abuts both the first doped region and the second doped region, wherein the second isolation region physically abuts the second doped region and the fourth doped region, and wherein the third isolation region physically abuts the first doped region and the fifth doped region.
10 more elements
A method of fabricating a semiconductor device, the method comprising:
- forming a first doped region of a second conductivity type at an upper surface of a semiconductor body of a first conductivity type, the second conductivity type being different than the first conductivity type;
- forming a second doped region of the second conductivity type at the upper surface of the semiconductor body;
- forming an isolation region within the semiconductor body between the first doped region and the second doped region, the isolation region physically abutting both the first doped region and the second doped region;
- forming a third doped region of the first conductivity type within the semiconductor body beneath the first doped region;
- forming a fourth doped region of the first conductivity type at the upper surface of the semiconductor body;
- forming a second isolation region within the semiconductor body between the second doped region and the fourth doped region, the second isolation region physically abutting the second doped region and the fourth doped region;
- forming a fifth doped region of the first conductivity type disposed within the semiconductor body beneath the second doped region;
- forming a sixth doped region of the first conductivity type disposed at the surface of the semiconductor body;
- and
- forming a third isolation region disposed within the semiconductor body between the first doped region and the sixth doped region, the third isolation region physically abutting the first doped region and the sixth doped region.
7 more elements
A method of fabricating a semiconductor device, the method comprising:
- forming a base region of a first conductivity type disposed in a semiconductor body;
- forming a first heavily doped region of a second conductivity type over the base region at an upper surface of the semiconductor body, the second conductivity type being different than the first conductivity type;
- forming a second heavily doped region of the second conductivity type over the base region at the upper surface of the semiconductor body;
- forming a first isolation region within the semiconductor body between the first heavily doped region and the second heavily doped region, the first isolation region physically abutting both the first heavily doped region and the second heavily doped region;
- and
- forming a first doped region of the first conductivity type within the semiconductor body beneath the first heavily doped region, the first doped region contacting the first heavily doped region and the base region.
3 more elements
Dependencies are inferred from the claim text.