Methods of fabricating flash memory devices comprising forming a silicide on exposed upper and side surfaces of a control gate

A method of fabricating a flash memory device, the method comprising:

• forming gate lines comprising a plurality of cell gate lines and a selection gate line, each comprising a stacked structure of a tunnel insulating layer, a floating gate, a gate insulating layer, and a polysilicon layer operable to be a control gate, formed on a semiconductor substrate;
• forming a first insulating layer that selectively fills gaps between the plurality of cell gate lines from the bottom up and between adjacent ones of the plurality of cell gate lines and the selection gate line, and does not fill a space located on an outer side of the selection gate line that is opposite the plurality of cell gate lines;
• forming a spacer on the outer side of the selection gate line that is opposite to the plurality of cell gate lines, after forming the first insulating layer;
• forming a second insulating layer adjacent the spacer on the outer side of the selection gate line,
• removing a hard mask of the gate lines;
• removing some parts of the first insulating layer, the second insulating layer, and the spacer so that at least a part of upper and side surfaces of the polysilicon layer operative to be the control gate in the gate lines is exposed;
• forming a metal silicide on the exposed portion of the polysilicon layer operative to be the control gate;
• and
• forming a third insulating layer on the semiconductor substrate on which the metal silicide is formed.