Encapsulated wafer level package with protection against damage and manufacturing method

A packaged semiconductor device, comprising:

• a substrate including at least one semiconductor chip layer and at least one connector arranged on the semiconductor chip layer, the substrate including a plurality of sides, and the substrate having been cut from a wafer along a scribe line of the wafer, the scribe line having had a width;
• and
• a resin cover covering each side of the substrate, the resin cover on at least one side of the substrate including an opening exposing the connector and the resin cover on at least one other side of the substrate exposing a portion of the substrate, wherein:
• the substrate is a portion of the semiconductor wafer, and
• a thickness, relative to the at least one other side of the substrate, of at least a portion of the resin cover abutting the at least one exposed portion of the substrate is equal to or less than 50% of the width of the scribe line.

A method of manufacturing a wafer level package, comprising:

• forming at least one opening in a portion of a wafer surrounding a predetermined sub-portion of the wafer corresponding to a device to be separated from a remaining portion of the wafer by removing a portion of the wafer in a scribe line of the wafer, the opening completely extending from a top side of the wafer to a bottom side of the wafer, and the wafer sub-portion remaining connected to the remaining portion of the wafer by at least one wafer connecting portion;
• covering the wafer sub-portion with a resin cover, the resin cover filling the opening formed in the portion of the wafer surrounding the wafer sub-portion and covering each side of the wafer sub-portion;
• and
• completely separating the wafer sub-portion from the remaining portion of the wafer along a boundary defined by the at least one wafer connecting portion and the portion of resin cover corresponding to the filled opening, wherein:
• at least one side of the wafer sub-portion includes at least one connector arranged thereon,
• covering the wafer sub-portion includes covering the wafer sub-portion, other than the at least one connector of the device and a separated side of the wafer connecting portion, the separated side corresponding to the side of the wafer connected portion exposed when separating the wafer sub-portion from the remaining portion of the wafer, and
• a thickness of a remaining portion of the resin cover relative to the respective side of the wafer-sub portion is equal to or less than about 50% of a width of the scribe line of the wafer.