US 8,026,162 B2 · Method of manufacturing layer-stacked wiring

Abstract

A layer-stacked wiring made up of a microcrystalline silicon thin film and a metal thin film is provided which is capable of suppressing an excessive silicide formation reaction between the microcrystalline silicon thin film and metal thin film, thereby preventing peeling of the thin film. In a polycrystalline silicon TFT (Thin Film Transistor) using the layer-stacked wiring, the microcrystalline silicon thin film is so configured that its crystal grains each having a length of the microcrystalline silicon thin film in a direction of a film thickness being 60% or more of a film thickness of the microcrystalline silicon thin film amount to 15% or less of total number of crystal grains or that its crystal grains each having a length of the microcrystalline silicon thin film in a direction of a film thickness being 50% or less of a film thickness of the microcrystalline silicon thin film amount to 85% or more of the total number of crystal grains making up the microcrystalline silicon thin film.

Claims6

Dependent claims

A method for manufacturing a layer-stacked wiring comprising a microcrystalline silicon thin film and a metal thin film formed on said microcrystalline silicon thin film, said method comprising:

a microcrystalline silicon thin film forming process to form a portion corresponding to a desired film thickness of said microcrystalline silicon thin film on an insulating substrate at a deposition rate that does not degrade, at least, quality of a thin film of said microcrystalline silicon thin film;
a metal thin film forming process to form said metal thin film on said microcrystalline silicon thin film;
and
a heat treatment process to perform heat treatment on said insulating substrate formed on said microcrystalline silicon thin film and said metal thin film,
wherein, in said microcrystalline silicon thin film forming process, a portion corresponding to a desired film thickness of said microcrystalline silicon thin film at a deposition rate combined with a deposition rate that degrades quality of a thin film of said microcrystalline silicon thin film.

2 more elements

Dependencies are inferred from the claim text.

Method of manufacturing layer-stacked wiring

Life of this patent

Method of manufacturing layer-stacked wiring

Life of this patent

Abstract

Claims6