Integrated circuit having resistor between BEOL interconnect and FEOL structure and related method
AssigneeInternational Business Machines Corporation
InventorsAnil K Chinthakindi, Vincent J McGahay
Life of this patent
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Abstract
Integrated circuits (IC) and a method of fabricating an IC, where the structure of the IC incorporates a back-end-of-the-line (BEOL) thin film resistor below a first metal layer to achieve lower topography are disclosed. The resistor directly contacts any one of: a contact metal in the front-end-of-the-line (FEOL) structure; first metal layer in the BEOL interconnect; or the combination thereof, to avoid the necessity of forming contacts with differing heights or contacts over varying topography.
Claims12
An integrated circuit having a first resistor between a back-end-of-the-line (BEOL) interconnect and a front-end-of-the-line (FEOL) structure, the integrated circuit comprising:
- a first metal layer of the BEOL interconnect disposed above a contact layer of the FEOL structure with the first resistor disposed between the first metal layer and the contact layer, wherein the first resistor is contacted by the first metal layer and the contact layer;
- a second resistor disposed above the first metal layer, wherein the second resistor is connected to the first metal layer through a wiring path that traverses at least two contacts and a second metal layer of the BEOL interconnect;
- and
- a polysilicon member disposed below the contact layer, wherein the polysilicon member is contacted by the contact layer.
An integrated circuit having a back-end-of-the-line (BEOL) interconnect and a front-end-of-the-line (FEOL) structure, the integrated circuit comprising:
- a first metal layer of the BEOL interconnect disposed above a contact layer of the FEOL structure;
- a second metal layer disposed above the first metal layer;
- a polysilicon member disposed below the contact layer and contacted by the contact layer;
- and
- a plurality of resistors in a substantially parallel configuration, the plurality of resistors including:
- a first resistor disposed between the first metal layer and the contact layer, wherein the first resistor contacts the first metal layer and the contact layer;
- and
- a second resistor disposed above the first metal layer, wherein the second resistor is connected to the first metal layer through a wiring path that traverses at least two contacts and the second metal layer of the BEOL interconnect.
A method of fabricating an integrated circuit having a first resistor between a back-end-of-the-line (BEOL) interconnect and a front-end-of-the-line (FEOL) structure, the method comprising:
- forming the first resistor above a contact layer of the FEOL structure;
- forming a first metal layer of the BEOL interconnect above the resistor, and
- forming a second resistor above the first metal layer, wherein the second resistor is connected to the first metal layer through a wiring path that traverses two contacts and a second metal layer formed above the first metal layer, and wherein the second resistor is substantially parallel to the first resistor;
- and
- wherein the first resistor contacts the contact layer and the first metal layer.
Dependencies are inferred from the claim text.