Nonvolatile semiconductor memory device with twin-well
AssigneeKabushiki Kaisha Toshiba
InventorsMitsuhiro Noguchi, Minori Kajimoto
Life of this patent
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Abstract
A nonvolatile semiconductor memory device includes a first well of a first conductivity type, which is formed in a semiconductor substrate of the first conductivity type, a plurality of memory cell transistors that are formed in the first well, a second well of a second conductivity type, which includes a first part that surrounds a side region of the first well and a second part that surrounds a lower region of the first well, and electrically isolates the first well from the semiconductor substrate, and a third well of the second conductivity type, which is formed in the semiconductor substrate. The third well has a less depth than the second part of the second well.
Claims7
A nonvolatile semiconductor memory device comprising:
- a semiconductor substrate of a first conductivity type;
- a first well of the first conductivity type, which is formed in the semiconductor substrate;
- a plurality of memory cell transistors that are formed in the first well;
- a second well of a second conductivity type, which includes a first part that surrounds a side region of the first well and a second part that surrounds a lower region of the first well, and electrically isolates the first well from the semiconductor substrate;
- and
- a third well of the second conductivity type, which is formed in the semiconductor substrate, the third well having a less depth than the second part of the second well, a bottom surface of the third well directly contacting the semiconductor substrate,
- wherein the first part of the second well has a less depth from a first surface of the semiconductor substrate than the second part of the second well, the first part of the second well is in contact with the second part of the second well to form a stepped contact part, and a boundary between a bottom surface of the third well and the semiconductor substrate is closer to the first surface of the semiconductor substrate than a boundary between a bottom surface of the second part of the second well and the semiconductor substrate.
Dependencies are inferred from the claim text.