Thin film transistor, method of manufacturing the same, and flat panel display device having the same

A flat panel display (FPD), comprising:

• a first substrate where a plurality of pixels are defined by a plurality of first and second conductive lines, a thin film transistor (TFT) of each of the plurality of pixels controls signals supplied to the each of the plurality of pixels, and the TFT is electrically coupled to a first electrode;
• a second substrate where a second electrode is formed and the second substrate is spaced apart from the first substrate;
• a liquid crystal layer injected into a sealed up space between the first electrode and the second electrode;
• and
• the TFT further comprising:
• a gate electrode formed on the first substrate;
• an oxide semiconductor layer electrically insulated from the gate electrode by a gate insulating layer and the oxide semiconductor layer including a channel region, a source region, and a drain region;
• a source electrode and a drain electrode respectively electrically contacting the source region and the drain region;
• and
• the oxide semiconductor layer being formed of an IZO layer (indium zinc oxide layer) including Zr, wherein a carrier density of the IZO layer is controlled to 1×1013 to 1×1018 (a number of carriers)*cm−3 by controlling an amount of Zr.

A flat panel display (FPD), comprising:

• a first substrate where organic light emitting diodes (OLEDs) each comprising a first electrode, an organic thin film layer, and a second electrode and a thin film transistor (TFT) for controlling an operation of each of the OLEDs are formed;
• and
• a second substrate provided to face to and be spaced apart from the first substrate,
• the TFT further comprising:
• a gate electrode formed on the first substrate;
• an oxide semiconductor layer electrically insulated from the gate electrode by a gate insulating layer and the oxide semiconductor layer including a channel region, a source region, and a drain region;
• a source electrode and a drain electrode respectively electrically contacting the source region and the drain region;
• and
• the oxide semiconductor layer being formed of an IZO layer (indium zinc oxide layer) including Zr, where in a carrier density of the IZO layer is controlled to 1×1013 to 1×1018 (a number of carriers)*cm−3 by controlling an amount of Zr.