Digital programmable frequency divider
AssigneeHypres, Inc.
InventorAlexander F. Kirichenko
Life of this patent
Estimating the term…
Abstract
A digital programmable frequency divider is constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), RSFQ D flip-flop and an RSFQ T flip-flop. A digital word comprising N bits is used to control the amount of frequency division and the frequency divider selectively imparts a respective frequency division for any of 2n states that can be represented by the digital word. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.
Claims20
A digital programmable frequency divider comprising a plurality of Single Flux Quantum (SFQ) logic elements having an input adapted to receive a multibit digital word having at least two possible states, an input adapted to receive a signal having a frequency, and at least one output, said digital programmable frequency divider being configured to produce at said output a divided frequency corresponding to said received signal divided by said received multibit digital word.
A method for selective frequency division by any natural number, comprising the steps of:
- providing a plurality of Single Flux Quantum (SFQ) logic elements configured to receive a multibit digital word having at least two possible states, receive a signal having a frequency, and to produce at an output a divided frequency corresponding to said received signal divided by said received multibit digital word;
- applying a source having a frequency as an input to the Single Flux Quantum logic cell;
- selectively dividing the frequency of the received signal in selective dependence on a state of the received multibit digital word;
- and
- outputting the selectively divided frequency.
A programmable digital frequency divider implemented in a circuit comprising Single Flux Quantum (SFQ) logic elements comprising flip-flops, having a first input which receives an N-bit digital word, a second input which receives a digital signal having a frequency, and a digital output representing a second input selectively divided by the first input, wherein a divide ratio of the programmable digital frequency divider is alterable by changing the N-bit digital word received at the first input.
Dependencies are inferred from the claim text.