Semiconductor device and associated layouts including gate electrode level region having arrangement of six linear conductive segments with side-to-side spacing less than 360 nanometers

A semiconductor device, comprising:

• a substrate having a portion of the substrate formed to include a plurality of diffusion regions, wherein the plurality of diffusion regions are separated from each other by one or more non-active regions of the portion of the substrate;
• a gate electrode level region formed above and over the portion of the substrate, the gate electrode level region including six linear-shaped conductive features defined to extend lengthwise in a first parallel direction, wherein some of the six linear-shaped conductive features are defined to include one or more gate electrode portions which extend over one or more of the plurality of diffusion regions to form respective transistor devices, wherein the six linear-shaped conductive features include,
• a first linear-shaped conductive feature defined to form both a gate electrode of a first transistor of a first transistor type and a gate electrode of a first transistor of a second transistor type,
• a second linear-shaped conductive feature defined to form a gate electrode of a second transistor of the first transistor type,
• a third linear-shaped conductive feature defined to form a gate electrode of a second transistor of the second transistor type,
• a fourth linear-shaped conductive feature defined to form a gate electrode of a third transistor of the first transistor type,
• a fifth linear-shaped conductive feature defined to form a gate electrode of a third transistor of the second transistor type,
• a sixth linear-shaped conductive feature defined to form a gate electrode of both a fourth transistor of the first transistor type and a gate electrode of a fourth transistor of the second transistor type, and
• wherein the first, second, fourth, and sixth linear conductive segments are positioned according to a substantially equal centerline-to-centerline spacing as measured in a second direction perpendicular to the first parallel direction, and
• wherein the first, third, fifth, and sixth linear conductive segments are also positioned according to the substantially equal centerline-to-centerline spacing as measured in the second direction, and
• wherein a side-to-side spacing between each adjacently positioned pair of the six linear conductive segments is less than 360 nanometers, wherein the side-to-side spacing is measured in the second direction.