Selective optical proximity layout design data correction
AssigneeMentor Graphics Corporation
InventorsJames C. Word, Dragos S. Dudau, Nicolas B. Cobb
Life of this patent
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Abstract
After layout design data has been modified using an OPC process, a repair flow is initiated. This repair flow includes analyzing the modified data to identify any remaining or new potential print errors in the layout data. Regions then are formed around the identified potential print errors, and a subsequent OPC process is performed only on the data within these regions using a different set of process parameters from the process parameters employed by the initial OPC process. This repair flow is iteratively repeated, where a different set of process parameter values for the subsequent OPC process is used during each iteration.
Claims20
A computer-implemented method of modifying integrated circuit layout design data, comprising:
- A. identifying a layout design, the layout design representing at least a portion of an integrated circuit design;
- B. implementing a resolution enhancement process having a first set of parameter values on the layout design, wherein an altered layout design is generated;
- C. checking for errors within the altered layout design, wherein one or more errors is detected;
- D. forming a re-correction region around at least one of the one or more detected errors, wherein the re-correction region designates a sub-portion of the altered layout design;
- E. identifying a second set of parameter values, wherein the second set of parameter values is different than the first set of parameter values;
- F. implementing an optical proximity correction process having the second set of parameter values on the sub-portion of the altered layout design designated by the re-correction region, wherein an altered sub-portion of the layout design is generated;
- G. stitching the altered sub-portion of the layout design into the altered layout design, wherein a modified layout design is generated;
- and
- H. saving the modified layout design to a memory storage location.
One or more computer-readable media, having computer executable instructions for modifying integrated circuit layout design data stored thereon, the computer executable instructions comprising:
- causing a computer to perform a set of operations;
- and
- wherein the set of operations include:
- A. identifying a layout design, the layout design representing at least a portion of an integrated circuit design;
- B. implementing a resolution enhancement process having a first set of parameter values on the layout design, wherein an altered layout design is generated;
- C. checking for errors within the altered layout design, wherein one or more errors is detected;
- D. forming a re-correction region around at least one of the one or more detected errors, wherein the re-correction region designates a sub-portion of the altered layout design;
- E. identifying a second set of parameter values, wherein the second set of parameter values is different than the first set of parameter values;
- F. implementing an optical proximity correction process having the second set of parameter values on the sub-portion of the altered layout design designated by the re-correction region, wherein an altered sub-portion of the layout design is generated;
- G. stitching the altered sub-portion of the layout design into the altered layout design, wherein a modified layout design is generated;
- and
- H. saving the modified layout design to a memory storage location.
An apparatus for modifying an integrated circuit design comprising:
- a recipe module configured to generate parameters to be used in a resolution enhancement process;
- a first alteration module configured to generate an altered layout design by implementing a resolution enhancement process using a first set of parameter values generated by the recipe module on a layout design representing at least a portion of an integrated circuit design;
- a verification module configured to check for errors within the altered layout design;
- a re-correction module configured to generate a re-correction region designating a sub-portion of the altered layout design by forming a re-correction region around at least one error detected by the verification module;
- a second alteration module configured to generate an altered sub-portion of the layout design by implementing an optical proximity correction process using a second set of parameter values generated by the recipe module on a sub-portion of the altered layout design designated by a re-correction region generated by the re-correction module, wherein the second set of parameter values is different than the first set of parameter values;
- and
- a stitching module configured to generate a modified layout design by stitching the altered sub-portion into the altered layout design.
Dependencies are inferred from the claim text.