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US 7,923,335 B2Granted
Non-volatile memory device and manufacturing method thereof
AssigneeHynix Semiconductor Inc.
InventorEun Seok Choi
Life of this patent
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Abstract
A non-volatile memory device having a Polysilicon Oxide Nitride Oxide Semiconductor (SONOS) structure in which a charge trap layer is separated physically in a horizontal direction, and a method of manufacturing the same. The charge trap layer that traps electric charges toward the source and the drain is physically divided. It can fundamentally prevent the charges at both sides from being moved mutually. It is therefore possible to prevent interference between charges at both sides although the cell size is reduced.
Claims9
A method of manufacturing a non-volatile memory device comprising the steps of:
- depositing a gate insulating layer, a buffer layer, a blocking oxide layer, and a gate electrode over a semiconductor substrate, respectively;
- etching the gate electrode, the blocking oxide layer, the buffer layer and the gate insulating layer to form a gate;
- performing an ion implant process to form source and drain regions within the semiconductor substrate;
- selectively forming a recessed pattern of the buffer layer by selectively etching the buffer layer both sides;
- depositing a charge trap material over the recessed pattern of the buffer layer, the gate, and the semiconductor substrate;
- and
- etching the charge trap material to allow the charge trap material to remain only at both sides of the buffer layer.
4 more elements
Dependencies are inferred from the claim text.