Method of manufacturing an electronic device including a PNP bipolar transistor

A method of manufacturing an electronic device including a PNP bipolar transistor, the method comprising:

• forming a P-well in a substrate to define a collector of the PNP bipolar transistor;
• forming a base layer epitaxially on the substrate above a portion of the P-well, a central region of the base layer being formed of an N-type crystalline material and a peripheral region being formed of a polycrystalline material;
• forming a nitride interface layer over a part of the central region of the base layer;
• forming an oxide layer adjacent to and surrounding the nitride interface layer over a remainder of the central region of the base layer not covered by the nitride interface layer;
• forming a nitride layer over the entirety of the oxide layer;
• forming a P-type layer over the nitride interface layer and the nitride layer to define an emitter of the PNP bipolar transistor;
• and
• forming sidewall spacers on edges of a stack comprising the oxide layer, the nitride layer and the P-type layer, the sidewall spacers extending from an uppermost surface of the P-type layer to a top surface in the peripheral region, leaving a portion of the top surface in the peripheral region exposed;
• whereby the P-type layer defining the emitter is spaced by the nitride interface layer from the base layer in a central portion and is spaced by the stack from the base layer in a peripheral portion.