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US 7,888,221 B2Granted
Tunneling field effect transistor using angled implants for forming asymmetric source/drain regions
AssigneeIntel Corporation
InventorsJack T. Kavalieros, Matthew V. Metz, Gilbert Dewey, Been-Yih Jin, Justin K. Brask, Suman Datta, Robert S. Chau
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Abstract
The present invention relates to a Tunnel Field Effect Transistor (TFET), which utilizes angle implantation and amorphization to form asymmetric source and drain regions. The TFET further includes a silicon germanium alloy epitaxial source region with a conductivity opposite that of the drain.
Claims22
A method of forming a semiconductor device comprising:
- forming a gate dielectric on a semiconductor substrate;
- forming a gate electrode on said gate dielectric;
- forming a drain region in said semiconductor substrate with a first conductivity;
- after forming said drain region, forming spacers adjacent to said gate dielectric and said gate electrode;
- after forming said spacers, forming a source region in said semiconductor substrate with a second conductivity, wherein said second conductivity is opposite said first conductivity.
2 more elements
A method of forming a semiconductor device comprising:
- forming a patterned stack on a semiconductor substrate;
- wherein said patterned stack comprises a gate dielectric and a gate electrode;
- implanting dopants in said semiconductor substrate at an angle sufficient to form a drain region and sufficient to have said implanting dopants shadowed across a source region location, such that said implanting dopants in said source region location is negligible;
- forming spacers adjacent to said patterned stack;
- forming a recess in said semiconductor substrate in said source region location;
- selectively growing an epitaxial layer in said recess of said semiconductor substrate to form a source region;
- wherein said epitaxial layer is not grown on said drain region.
4 more elements
A method of forming a semiconductor device comprising:
- forming a patterned stack on a semiconductor substrate;
- wherein said patterned stack comprises a gate dielectric and a gate electrode;
- forming a drain region within said semiconductor substrate;
- forming spacers adjacent to said patterned stack;
- implanting amorphizing species in said semiconductor substrate at an angle sufficient to amorphize a source region location and sufficient to have said amorphizing species shadowed across said drain region such that amorphizing of said drain region is negligible;
- selectively etching said amorphized source region location to form a recess in said semiconductor substrate at said source region location and not at said drain region;
- forming a source material within said recess.
4 more elements
A method of forming a semiconductor device comprising:
- forming a patterned stack on a semiconductor substrate;
- wherein said patterned stack comprises a gate dielectric and a gate electrode;
- implanting dopants in said semiconductor substrate at an angle sufficient to form a drain region and sufficient to have said dopants shadowed across a source region location such that doping of said source region location is negligible;
- forming spacers adjacent to said patterned stack;
- implanting amorphizing species in said semiconductor substrate at an angle sufficient to amorphize said source region location and sufficient to have said amorphizing species shadowed across said drain regions such that amorphizing of said drain region is negligible;
- selectively etching said amorphized source region location to form a recess in said semiconductor substrate at said source region location and not said drain region;
- growing an epitaxial layer in said recess of said semiconductor substrate defining said source region;
- wherein epitaxial layer is not grown in said drain region.
5 more elements
Dependencies are inferred from the claim text.