CMOS inverter layout for increasing effective channel length

A method of fabricating a complementary metal oxide semiconductor (CMOS) inverter, comprising:

• forming m first active regions and n second active regions, where m and n are natural numbers equal to or greater than 2, the m first active regions are aligned in parallel at regular intervals in an N-well region and the n second active regions are aligned in parallel at regular intervals in a P-substrate or a P-well region;
• forming first conductive MOS transistors in the m first active regions on a semiconductor substrate using a computing device, and second conductive MOS transistors in the n second active regions;
• and
• forming (m−1) first metal lines which electrically connect the m first active regions, and (n−1) second metal lines which electrically connect the n second active regions, wherein forming the first and second conductive MOS transistors includes,
• forming at least one gate having at least a portion intersecting the at least two of the first and second active regions, the at least one gate corresponding to a minimum feature size.

A complementary metal oxide semiconductor (CMOS) inverter layout comprising:

• a plurality of first conductive MOS transistors serially connected via at least one first metal line and arranged in a plurality of first active regions having a second conductivity;
• a plurality of second conductive MOS transistors serially connected via at least one second metal line and arranged in a plurality of second active regions having a first conductivity that is opposite the second conductivity;
• and
• a gate electrode connecting a plurality of gates of the first conductive MOS transistors and the second conductive MOS transistors, the gate electrode intersecting at least two of the first active regions and the second active regions, wherein
• a width of the gate electrode corresponds to a minimum feature size, and
• the plurality of first active regions are aligned in parallel at regular intervals in an N-well region and the plurality of second active regions are aligned in parallel at regular intervals in a P-substrate or a P-well region.