US 7,842,973 B2 · Semiconductor device and manufacturing method of the same

Abstract

A semiconductor device capable of avoiding generation of a barrier in a conduction band while maintaining high withstanding voltage and enabling high speed transistor operation at high current in a double hetero bipolar transistor, as well as a manufacturing method thereof, wherein a portion of the base and the collector is formed of a material with a forbidden band width narrower than that of a semiconductor substrate, a region where the forbidden band increases stepwise and continuously from the emitter side to the collector side is disposed in the inside of the base and the forbidden band width at the base-collector interface is designed so as to be larger than the minimum forbidden band width in the base, whereby the forbidden band width at the base layer edge on the collector side can be made closer to the forbidden band width of the semiconductor substrate than usual while sufficiently maintaining the hetero effect near the emitter-base thereby capable of decreasing the height of the energy barrier generated upon increase of the collector current and enabling satisfactory transistor operation at high current.

Claims17

Dependent claims

A semiconductor device comprising:

a first conduction type first semiconductor layer buried in a semiconductor substrate;
a first conduction type second semiconductor layer disposed above the first semiconductor layer;
a first conduction type third semiconductor layer disposed above the second semiconductor layer and containing, at a portion thereof, a material having a smaller forbidden band width than that of the semiconductor substrate;
and
a second conduction type fourth semiconductor layer disposed above the third semiconductor layer and having a smaller forbidden band width than that of the semiconductor substrate, and a first conduction type fifth semiconductor layer disposed above the fourth semiconductor layer,
wherein the fourth semiconductor layer has a region where:
the forbidden band width increases stepwise or continuously toward the third semiconductor layer;
the forbidden band width at the interface between the third semiconductor layer and the fourth semiconductor layer is larger than the smallest forbidden band width in the inside of the fourth semiconductor layer;
and
the forbidden band width is constant near the region where the forbidden band width is smallest in the inside of the fourth semiconductor layer.

7 more elements

A method of manufacturing a semiconductor device comprising steps of:

forming a first conduction type first semiconductor layer above a semiconductor substrate;
forming a first conduction type second semiconductor layer above the first semiconductor layer;
forming a first conduction type third semiconductor layer containing, at a portion thereof, a material having a smaller forbidden band width than that of the semiconductor substrate above the second semiconductor layer and forming a second conduction type fourth semiconductor layer having a smaller forbidden band width than that of the semiconductor substrate above the third semiconductor layer;
and
forming a first conduction type fifth semiconductor layer above the fourth semiconductor layer,
wherein the fourth semiconductor layer has a region where:
the forbidden band width increases stepwise or continuously toward the third semiconductor layer;
the forbidden band width at the interface between the third semiconductor layer and the fourth semiconductor layer is larger than the smallest forbidden band width in the inside of the fourth semiconductor layer;
and
the forbidden band width is constant near the region where the forbidden band width is smallest in the inside of the fourth semiconductor layer.

7 more elements

Dependencies are inferred from the claim text.

Semiconductor device and manufacturing method of the same

Life of this patent

Semiconductor device and manufacturing method of the same

Life of this patent

Abstract

Claims17