Vertical MOS transistor device with asymmetrical source and drain and its manufacturing method

A method for manufacturing a semiconductor device:

• a first insulating film;
• a second insulating film
• a third insulating film;
• a first conductive film;
• a second conductive film;
• a first impurity diffusion area of a first conductivity type;
• a second impurity diffusion area of a second conductivity type which is different from the first conductivity type;
• a third impurity diffusion area of the first conductivity type;
• a fourth impurity diffusion area of the first conductivity type of which concentration is higher than in the third impurity diffusion area;
• an interlayer insulating film;
• and
• contact plugs, the method comprising:
• forming the first insulating film and the second insulating film downward from a surface of a semiconductor substrate so that the first and second insulating films are at a distance from each other in a direction parallel to the surface of the semiconductor substrate;
• forming the second impurity diffusion area in a first area sandwiched between at least the first and second insulating films after forming the first and second insulating films;
• forming the first impurity diffusion area and the third impurity diffusion area, respectively, by implanting low concentration ions of the first conductivity type a plurality of times with different conditions for implantation after forming the second impurity diffusion area, the first impurity diffusion area being formed from a point which is deeper than bottoms of the first and second insulating films to a point which is shallower than the bottoms but deeper than an upper surface of the semiconductor substrate so as to make contact with at least the bottoms of the first and second insulating films and portions of outer walls of the first and second insulating films facing each other within the first area, the third impurity diffusion area being formed so as to face the first impurity diffusion area across the second impurity diffusion area and make contact with portions of the outer walls of the first and second insulating films facing each other within the first area;
• forming a first trench and a second trench, respectively, by carrying out an etching process on the first and second insulating films in such a state that predetermined areas are masked after forming the first and third impurity diffusion areas, the first trench having a bottom composed of the first impurity diffusion area and an inner wall surrounded by the first insulating film, the second trench having a bottom composed of the first impurity diffusion area and an inner wall of which a portion is made of the second insulating film and the remaining portion is made of a multilayer structure of the first impurity diffusion area, the second impurity diffusion area and the third impurity diffusion area;
• forming the third insulating film by carrying out an oxidation process after forming the first and second trenches, the third insulating film extending from at least the bottom of the second trench to the upper surface of the semiconductor substrate within the first area via the multilayer structure which forms a part of the inner wall of the second trench;
• forming the first conductive film for filling in the first trench and the second conductive film for filling in the second trench by forming a conductive material film over an entire surface so that the first and second trenches are completely filled after forming the third insulating film, and by dividing the conductive material film at a point above an area sandwiched between the first and second trenches;
• exposing the third impurity diffusion area by removing the third insulating film formed within an area sandwiched between the first and second conductive films after forming the first and second conductive films;
• forming the fourth impurity diffusion area on the third impurity diffusion area by implanting impurity ions of the first conductivity type in a high concentration after exposing the third impurity diffusion area;
• forming the interlayer insulating film over an entire surface after forming the fourth impurity diffusion area;
• and
• forming the contact plugs for making electrical contact with the first conductive film, the second conductive film and the fourth impurity diffusion area, respectively after forming the interlayer insulating film.