FinFET and method of manufacturing the same

A method of manufacturing a semiconductor device, comprising:

• etching a semiconductor substrate to form a semiconductor fin having a top surface and a sidewall, the top surface having a crystal plane {110} and the sidewall having a crystal plane {100};
• forming a dielectric layer pattern extending along the semiconductor fin;
• thermally oxidizing the semiconductor substrate to form a first thermal oxide layer on the sidewall of the semiconductor fin and to form a second thermal oxide layer on the top surface of the semiconductor fin, such that the second thermal oxide layer is thicker than the first thermal oxide layer;
• and
• forming a gate electrode on the first and second thermal oxide layers, wherein:
• the first thermal oxide layer and the second thermal oxide layer are simultaneously formed;
• and
• forming the first and second thermal oxide layers includes:
• forming a mask pattern on the dielectric layer pattern and the top surface of the semiconductor fin to define a line region where a gate electrode will be formed, the line region being substantially perpendicular to the semiconductor fin,
• partially etching the exposed dielectric layer pattern using the mask pattern as an etch mask to expose the sidewall of the semiconductor fin;
• and
• thermally oxidizing the top surface and sidewall of the semiconductor fin having the different crystal planes.

A method of manufacturing a semiconductor device, comprising:

• etching a semiconductor substrate to form a semiconductor fin extending in a first direction and having a top surface and a sidewall, the top surface having a crystal plane{110} and the sidewall having a crystal plane {100};
• forming a dielectric layer pattern defining an active region of the substrate;
• planarizing the dielectric layer pattern to expose the top surface of the semiconductor fin;
• forming a first mask pattern extending in a second direction crossing the first direction to define a line region where a gate electrode will be formed, the line region being substantially perpendicular to the semiconductor fin;
• removing a portion of the dielectric layer pattern according to the mask pattern to expose a portion of the sidewall of the semiconductor fin;
• thermally oxidizing the top surface and sidewall of the semiconductor fin having the different crystal planes to form a first thermal oxide layer on the sidewall of the semiconductor fin and a second thermal oxide layer on the top surface of the semiconductor fin simultaneously, such that the second thermal oxide layer is thicker than the first thermal oxide layer;
• and
• forming a gate electrode to fill the removing portion of the dielectric layer pattern, the gate electrode extending in the second direction.