US 7,796,969 B2 · Symmetrically and asymmetrically stacked transistor group RF switch

Abstract

A silicon-on-insulator (SOI) RF switch adapted for improved power handling capability using a reduced number of transistors is described. In one embodiment, an RF switch includes pairs of switching and shunting stacked transistor groupings to selectively couple RF signals between a plurality of input/output nodes and a common RF node. The switching and shunting stacked transistor groupings comprise one or more MOSFET transistors connected together in a “stacked” or serial configuration. In one embodiment, the transistor groupings are “symmetrically” stacked in the RF switch (i.e., the transistor groupings all comprise an identical number of transistors). In another embodiment, the transistor groupings are “asymmetrically” stacked in the RF switch (i.e., at least one transistor grouping comprises a number of transistors that is unequal to the number of transistors comprising at least one other transistor grouping). The stacked configuration of the transistor groupings enable the RF switch to withstand RF signals of varying and increased power levels. The asymmetrically stacked transistor grouping RF switch facilitates area-efficient implementation of the RF switch in an integrated circuit. Maximum input and output signal power levels can be withstood using a reduced number of stacked transistors.

Claims30

Dependent claims

An asymmetrically stacked transistor grouping RF switch circuit for switching RF signals, comprising:

a) at least one switch-shunt circuit controlled by a switch control signal, comprising:
(1) at least one switching transistor grouping controlled by the switch control signal, wherein the at least one switching transistor grouping comprises at least one switching stacked transistor grouping;
and
(2) at least one shunting transistor grouping controlled by the switch control signal, wherein the at least one shunting transistor grouping comprises at least one shunting stacked transistor grouping;
wherein the stacked transistor groupings comprise one or more FETs arranged in a stacked configuration, wherein each of said FETs has a gate that is insulated from its channel, and wherein a number of FETs comprising at least one of the shunting transistor groupings is unequal to a number of FETs comprising at least one transistor grouping selected from the following:
1) the at least one switching transistor grouping, and 2) the at least one shunting transistor grouping.

3 more elements

A symmetrically stacked transistor grouping RF switch circuit for switching RF signals, comprising:

a) at least one switch-shunt circuit controlled by a switch control signal, comprising:
(1) at least one switching transistor grouping controlled by the switch control signal, wherein the at least one switching transistor grouping comprises at least one switching stacked transistor grouping;
and
(2) at least one shunting transistor grouping controlled by the switch control signal, wherein the at least one shunting transistor grouping comprises at least one shunting stacked transistor grouping;
wherein the stacked transistor groupings comprise one or more FETs arranged in a stacked configuration, wherein each of said FETs has a gate that is insulated from its channel, and wherein the switching and shunting stacked transistor groupings comprise an equal number of FETs, and wherein the number of FETs is determined by maximum power levels applied by the RF signals.

2 more elements

An asymmetrically stacked transistor grouping RF switch circuit for switching RF signals, comprising:

(a) a first input port receiving a first RF input signal;
(b) a second input port receiving a second RF input signal;
(c) an RF common port;
(d) a first switch transistor grouping comprising a plurality of FETs arranged in a stacked configuration, wherein each of said FETs has a gate that is insulated from its channel, wherein said first switch transistor grouping has a first node coupled to the first input port and a second node coupled to the RF common port, and wherein the first switch transistor grouping is controlled by a switch control signal (SW);
(e) a second switch transistor grouping comprising a plurality of FETs arranged in a stacked configuration, wherein each of said FETs has a gate that is insulated from its channel, wherein said second transistor grouping has a first node coupled to the second input port and a second node coupled to the RF common port, and wherein the second switch transistor grouping is controlled by an inverse (SW_) of the switch control signal (SW);
(f) a first shunt transistor grouping comprising a plurality of FETs arranged in a stacked configuration, wherein each of said FETs has a gate that is insulated from its channel, wherein said first shunt transistor grouping has a first node coupled to the second input port and a second node coupled to ground, and wherein the first shunt transistor grouping is controlled by the switch control signal (SW);
and
(g) a second shunt transistor grouping comprising a plurality of FETs arranged in a stacked configuration, wherein each of said FETs has a gate that is insulated from its channel, wherein said second shunt transistor grouping has a first node coupled to the first input port and a second node coupled to ground, wherein the second shunt transistor grouping is controlled by the inverse (SW_) of the switch control signal (SW);
wherein, when SW is enabled, the first switch and shunt transistor groupings are enabled while the second switch and shunt transistor groupings are disabled, thereby passing the first RF input signal through to the RF common port and shunting the second RF input signal to ground, and wherein when SW is disabled, the second switch and shunt transistor groupings are enabled while the first switch and shunt transistor groupings are disabled, thereby passing the second RF input signal through to the RF common port and shunting the first RF input signal to ground, and wherein a number of FETs comprising at least one of the shunt transistor groupings is unequal to a number of FETs comprising at least one transistor grouping selected from the following:
1) the first switch transistor grouping, 2) the second switch transistor grouping;
3) the first shunt transistor grouping, and 4) the second shunt transistor grouping.

8 more elements

A method of switching RF signals, comprising:

(a) inputting a first RF input signal to a first switch transistor grouping and a first shunt transistor grouping, wherein both the first switch and first shunt transistor groupings comprise a plurality of stacked FETs, each of which has a gate that is insulated from its channel;
(b) inputting a second RF input signal to a second switch transistor grouping and a second shunt transistor grouping, wherein both the second switch and second shunt transistor groupings comprise a plurality of stacked FETs, each of which has a gate that is insulated from its channel, wherein a number of FETs comprising at least one of the shunt transistor groupings is unequal to a number of FETs comprising at least one transistor grouping selected from the following:
1) the first switch transistor grouping, 2) the second switch transistor grouping;
3) the first shunt transistor grouping, and 4) the second shunt transistor grouping;
(c) enabling the first switch transistor grouping while disabling the first shunt transistor grouping, and simultaneously disabling the second switch transistor grouping while enabling the second shunt transistor grouping, thereby passing the first RF input signal and shunting the second RF input signal;
and, at exclusively alternative times;
and
(d) enabling the second switch transistor grouping while disabling the second shunt transistor grouping, and simultaneously disabling the first switch transistor grouping while enabling the first shunt transistor grouping, thereby passing the second RF input signal and shunting the first RF input signal.

5 more elements

A symmetrically stacked transistor grouping RF switch circuit for switching RF signals, comprising:

(a) a first input port receiving a first RF input signal;
(b) a second input port receiving a second RF input signal;
(c) an RF common port;
(d) a first switch transistor grouping comprising a plurality of FETs arranged in a stacked configuration, wherein each of said FETs has a gate that is insulated from its channel, wherein said first switch transistor grouping has a first node coupled to the first input port and a second node coupled to the RF common port, and wherein the first switch transistor grouping is controlled by a switch control signal (SW);
(e) a second switch transistor grouping comprising a plurality of FETs arranged in a stacked configuration, wherein each of said FETs has a gate that is insulated from its channel, wherein said second transistor grouping has a first node coupled to the second input port and a second node coupled to the RF common port, and wherein the second switch transistor grouping is controlled by an inverse (SW_) of the switch control signal (SW);
(f) a first shunt transistor grouping comprising a plurality of FETs arranged in a stacked configuration, wherein each of said FETs has a gate that is insulated from its channel, wherein said first shunt transistor grouping has a first node coupled to the second input port and a second node coupled to ground, and wherein the first shunt transistor grouping is controlled by the switch control signal (SW);
and
(g) a second shunt transistor grouping comprising a plurality of FETs arranged in a stacked configuration, wherein each of said FETs has a gate that is insulated from its channel, wherein said second shunt transistor grouping has a first node coupled to the first input port and a second node coupled to ground, wherein the second shunt transistor grouping is controlled by the inverse (SW_) of the switch control signal (SW);
wherein, when SW is enabled, the first switch and shunt transistor groupings are enabled while the second switch and shunt transistor groupings are disabled, thereby passing the first RF input signal through to the RF common port and shunting the second RF input signal to ground, and wherein when SW is disabled, the second switch and shunt transistor groupings are enabled while the first switch and shunt transistor groupings are disabled, thereby passing the second RF input signal through to the RF common port and shunting the first RF input signal to ground, and wherein the switch and shunt transistor groupings comprise an equal number of FETs, and wherein the number of FETs is determined by maximum power levels applied by the RF signals.

6 more elements

Dependencies are inferred from the claim text.

Symmetrically and asymmetrically stacked transistor group RF switch

Life of this patent

Symmetrically and asymmetrically stacked transistor group RF switch

Life of this patent

Abstract

Claims30