US 7,746,253 B2 · Semiconductor integrated circuit

Abstract

The present invention is directed to reduce offset error voltage in a signal source impedance of analog input signal voltage supplied to an input terminal due to input offset voltage of an operational amplifier in a sampling circuit or a multiplexer coupled to an input terminal of an A/D converter. A semiconductor integrated circuit has an A/D converter and a sampling circuit. The sampling circuit samples an analog input signal in first and second sample modes. The A/D converter converts the sampled analog signal to a digital signal in a conversion mode. By switching of an internal circuit of an operational amplifier between the first and second sample modes, the functions of a non-inverting input terminal (+) and an inverting input terminal (−) realized by first and second input terminals are switched. Synchronously with the switching, supply of an analog signal to the non-inverting input terminal by input switches is also switched.

A semiconductor integrated circuit comprising an A/D converter and a sampling circuit coupled to an input terminal of the A/D converter,

wherein the sampling circuit includes an analog input terminal, an operational amplifier, a first switch, a second switch, a third switch, a fourth switch, a fifth switch, and an analog output terminal,
wherein the analog input terminal is coupled to one end of the first switch and one end of the second switch, the other end of the first switch and the other end of the second switch are coupled to first and second input terminals, respectively, of the operational amplifier,
wherein one end and the other end of the third switch are coupled to the first input terminal of the operational amplifier and an output terminal of the operational amplifier, respectively, one end and the other end of the fourth switch are coupled to the first input terminal of the operational amplifier and the output terminal of the operational amplifier, respectively,
wherein an output terminal of the operational amplifier is coupled to an input terminal of the A/D converter via the analog output terminal,
wherein one end and the other end of the fifth switch are coupled to the analog input terminal and the analog output terminal, respectively, so as to bypass the operational amplifier,
wherein the sampling circuit samples an analog input signal supplied to the analog input terminal in first and second sample modes,
wherein the A/D converter converts an analog signal sampled by the sampling circuit in the first or second sample mode to a digital signal in a conversion mode after the first or second sample mode,
wherein in a first half of the first sample mode of the sampling circuit, the first and fourth switches are controlled in an on state and, on the other hand, the second, third, and fifth switches are controlled in an off state,
wherein in the first half of the first sample mode of the sampling circuit, an internal circuit of the operational amplifier is controlled so that the first and second input terminals of the operation amplifier function as a non-inverting input terminal and an inverting input terminal of the operational amplifier, respectively,
wherein in a latter half of the first sample mode of the sampling circuit, driving of the analog output terminal by the operational amplifier is stopped and, on the other hand, the fifth switch is controlled in the on state,
wherein in the latter half of the first sample mode of the sampling circuit, the analog input signal supplied to the analog input terminal is transmitted to the input terminal of the A/D converter via the fifth switch and the analog output terminal,
wherein in the first half of the second sample mode of the sampling circuit, the first, fourth, and fifth switches are controlled in an off state and, on the other hand, the second and third switches are controlled in an on state,
wherein in the first half of the second sample mode of the sampling circuit, the internal circuit of the operational amplifier is controlled so that the first and second input terminals of the operational amplifier function as an inverting input terminal and a non-inverting input terminal of the operational amplifier, respectively,
wherein in the latter half of the second sample mode of the sampling circuit, driving of the analog output terminal by the operational amplifier is stopped and, on the other hand, the fifth switch is controlled in the on state, and
wherein in the latter half of the second sample mode of the sampling circuit, the analog input signal supplied to the analog input terminal is transmitted to the input terminal of the A/D converter via the fifth switch and the analog output terminal.

12 more elements

Semiconductor integrated circuit

Life of this patent

Semiconductor integrated circuit

Life of this patent

Abstract

Claims18