Digital offset phase-locked loop

A radio frequency (RF) circuit comprising:

• a first digital controlled oscillator (DCO) adapted to:
• receive a first digital control signal;
• and
• provide an RF output signal having a first frequency and a first phase, such that the first frequency is based on the first digital control signal;
• a first RF mixer circuit adapted to:
• receive a first local oscillator (LO) signal and the RF output signal;
• and
• provide a first intermediate frequency (IF) signal based on mixing the first LO signal and the RF output signal;
• a time-to-digital converter adapted to:
• receive and convert the first IF signal into a digital time representation of the first IF signal;
• and
• provide a first digital signal based on the digital time representation, such that the first digital signal is indicative of the first phase and the first frequency;
• and
• digital loop circuitry adapted to:
• receive a digital setpoint signal;
• receive the first digital signal;
• and
• provide the first digital control signal based on a difference between the digital setpoint signal and the first digital signal,
• wherein the first frequency is controlled to be about equal to a desired frequency represented by the digital setpoint signal.