Power FET gate charge recovery

A synchronous voltage regulation circuit that is arranged to recover charge at a gate of a first output transistor and a gate of a second output transistor, comprising:

• a first switching transistor that is arranged to enable the first output transistor to conduct and to provide a positive output voltage at a source terminal of the first output transistor that is coupled to an output terminal;
• a second switching transistor that is arranged to enable the first output transistor to stop conduction and which enables a voltage at or below ground to be provided to the source terminal of the first output transistor;
• a first switching device that is coupled between the gate of the first output transistor and a first capacitor coupled to a high side positive terminal of a voltage supply, wherein the conduction of the first switching device enables at least a portion of charge at the gate of the first output transistor to be recovered at the first capacitor coupled to the high side positive terminal of the voltage supply;
• a third switching transistor that is arranged to enable the second output transistor to conduct, wherein the conduction of the second output transistor provides a low side positive output voltage at a source terminal of the second output transistor that is coupled to the output terminal;
• a fourth switching transistor that is arranged to control the non-conduction of the second output transistor and which enables a voltage to be provided at or below ground at the source terminal of the second output transistor;
• a second switching device that is coupled between the gate of the second output transistor and a second capacitor coupled to a low side positive voltage, wherein the conduction of the second switching device enables at least a portion of the charge at the gate of the second output transistor to be recovered at the second capacitor coupled to the low side positive voltage;
• and
• a control circuit that is separately coupled to a gate of the first switching transistor, a gate of the second switching transistor, a gate of the third switching transistor, and a gate of the fourth switching transistor, wherein the control circuit is arranged to separately control the conduction and non-conduction of the first, second, third, and fourth switching transistors, and wherein the conduction of the first switching transistor enables charge recovered at the first capacitor to be reused at the gate of the first output transistor to enable its conduction and the conduction of the second switching transistor enables charge recovered at the second capacitor to be reused at the gate of the second output transistor to also enable its conduction.

A method for recovering charge from a gate of an output transistor in a voltage regulation circuit, comprising:

• disabling conduction of a first switching transistor to cause the output transistor to also stop conducting and stop providing an output voltage at an output terminal based on an input voltage;
• enabling conduction and subsequent non-conduction of a switching device to recover at least a portion of charge at a gate of the output transistor at a bypass capacitor coupled to a voltage supply if the first switching transistor and the output transistor are disabled from conducting;
• enabling conduction of a second switching transistor to drain a remaining portion of charge at the gate of the output transistor to ground if the output transistor and the switching device are non-conducting;
• and
• enabling the recovered charge at the bypass capacitor to be provided at the gate of the output transistor to enable its conduction if the first switching transistor is conducting and the second switching transistor is non-conducting.