Junction field effect transistor input buffer level shifting circuit
AssigneeSuVolta, Inc.
InventorsRichard K. Chou, Damodar R. Thummalapally
Life of this patent
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Abstract
A level shifting circuit can include a first input junction field effect transistor (JFET) having a gate coupled to receive an input signal having a first voltage swing that provides a controllable impedance path between a first supply node and a first terminal of a first bias stack including at least one JFET. A driver circuit can be coupled to receive an output from the first bias stack that provides a level shifted output having a second voltage swing that is less than the first voltage swing.
Claims13
A method of interfacing between a first semiconductor device including junction field effect transistors (JFETs) and a bus, comprising the steps of:
- receiving an input signal having a first voltage swing at an input terminal of the first semiconductor device including JFETs;
- translating the input signal to an internal signal having a second voltage swing lower than the first voltage swing;
- providing the input signal onto the bus from a second semiconductor device operating at a second power supply voltage higher than a first power supply voltage at which the first semiconductor device operates;
- receiving the internal signal by core circuitry including JFETs and operating at a first power supply voltage;
- providing a second internal signal having essentially the second voltage swing from the core circuitry;
- and
- translating the second internal signal to an output signal having essentially the first voltage swing.
A system, comprising:
- at least a first semiconductor device, comprising
- an input buffer including at least one junction field effect transistor (JFET), the input buffer receiving an input signal having a first voltage swing and providing a shifted signal having a second voltage swing lower than the first voltage swing;
- and
- core circuitry comprising JFETs, the core circuitry coupled to receive the shifted signal wherein the core circuitry operates from a first power supply having a magnitude less than the first voltage swing;
- and
- an output buffer including at least one JFET, the output buffer coupled to receive a first signal having essentially the second voltage swing from the core circuitry and providing an output signal having essentially the first voltage swing.
Dependencies are inferred from the claim text.