Clock generating circuit and semiconductor device provided with clock generating circuit

A clock generating circuit comprising:

• an output voltage detecting circuit for detecting an output voltage from a battery;
• a frequency-division number determining circuit for determining the number of frequency-division by a value of the output voltage detected by the output voltage detecting circuit;
• an oscillation circuit for outputting a reference clock signal depending on the output voltage;
• a counter circuit for counting a number of waves of the reference clock signal;
• and
• a frequency-dividing circuit that outputs a signal, which is the reference clock signal that is frequency-divided, as a clock signal, to a logic circuit,
• wherein the counter circuit outputs a signal for performing a frequency-division with the number of frequency-division determined by the frequency-division number determining circuit when the counted number of waves reaches a number of waves corresponding to the number of frequency-division after the counter circuit outputs a signal for performing a frequency-division once.

A semiconductor device equipped with an antenna and performs transmission and reception of a signal by wireless communication with a reader/writer comprising:

• a clock generating circuit;
• a logic circuit;
• and
• a battery,
• wherein the clock generating circuit includes:
• an output voltage detecting circuit for detecting an output voltage from a battery;
• a frequency-division number determining circuit for determining the number of frequency-division by a value of the output voltage detected by the output voltage detecting circuit;
• an oscillation circuit for outputting a reference clock signal depending on the output voltage;
• a counter circuit for counting a number of waves of the reference clock signal;
• and
• a frequency-dividing circuit that frequency-divides the reference clock signal,
• wherein the counter circuit outputs a signal for performing a frequency-division with the number of frequency-division determined by the frequency-division number determining circuit when the counted number of waves reaches a number of waves corresponding to the number of frequency-division after the counter circuit outputs a signal for performing a frequency-division once.

A semiconductor device equipped with an antenna and performs transmission and reception of a signal by wireless communication with a reader/writer comprising:

• a clock generating circuit;
• a logic circuit;
• and
• a battery,
• wherein the clock generating circuit includes:
• an output voltage detecting circuit for detecting an output voltage from a battery;
• a frequency-division number determining circuit for determining the number of frequency-division by a value of the output voltage detected by the output voltage detecting circuit;
• an oscillation circuit for outputting a reference clock signal depending on the output voltage;
• a counter circuit for counting a number of waves of the reference clock signal;
• and
• a frequency-dividing circuit that outputs a signal, which is the reference clock signal that is frequency-divided, as a clock signal, to a logic circuit,
• wherein the counter circuit outputs a signal for performing a frequency-division with the number of frequency-division determined by the frequency-division number determining circuit when the counted number of waves reaches a number of waves corresponding to the number of frequency-division after the counter circuit outputs a signal for performing a frequency-division once.