Leakage compensation for sample and hold devices

A method for compensating for leakage in a sample and hold circuit, comprising:

• buffering a received input signal;
• closing a first switch to sample the buffered input signal to produce a sampled input signal, wherein the first switch is closed to produce the sampled input signal using a first capacitor such that the sampled input signal is held by the first capacitor;
• accumulating a first leakage charge in the first capacitor in response to a first leakage current that flows between first and second conductive terminals of the first switch;
• accumulating a second leakage charge in a second capacitor in response to a second leakage current that flows between first and second conductive terminals of the second switch;
• and
• producing a compensated sampled value by subtracting a quantity from a signal developed in response to the held sampled signal and the accumulated first leakage charge, wherein the quantity is developed in response to the accumulated leakage charge in the second capacitor.

A sampling circuit for use in an integrated circuit, comprising:

• a first switch coupled to receive an input signal and coupled to a first storage capacitor for sampling the input signal, wherein the first switch is closed to produce a charge in the first capacitor in response to the input signal such that sampled signal is held by the first capacitor, and wherein the first switch allows a first leakage current to flow between first and second conductive terminals of the first switch and to accumulate a first leakage charge in the first capacitor;
• a second switch coupled to a second storage capacitor for storing a second leakage current, wherein the second switch allows the second leakage current to flow between the first and second conductive terminals of the second switch and to accumulate a second leakage charge in the second capacitor;
• and
• an offset circuit for producing a compensated sampled value by subtracting a quantity from a signal developed in response to the held sampled signal and charge accumulated through the first switch, wherein the quantity is subtracted in response to the accumulated leakage charge in the second capacitor.