US 7,746,106 B1Granted

Circuits for enabling feedback paths in a self-timed integrated circuit

AssigneeXilinx, Inc.

InventorsBrian C. Gaide, Steven P. Young

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Abstract

Circuits enabling feedback paths in a self-timed integrated circuit. Each of a plurality of interconnected logic blocks includes a logic circuit having first and second outputs, and means for placing, during an initial cycle, a self-timed first data signal on the second output onto a logic block output, and for placing, during subsequent cycles, a self-timed second data signal on a selected one of the first or second outputs onto the logic block output. Initially, an output token is provided only when valid new data is received on the second output and on a select signal. Subsequently, the output token is provided only when either the first output of the logic circuit is selected, and valid new data is received on the first output and on the select signal; or the second output of the logic circuit is selected, and valid new data is received on the first and second outputs and on the select signal.

Claims20

Dependent claims

An integrated circuit, comprising:

a plurality of interconnected logic blocks, each of the logic blocks comprising:
a logic circuit having an input coupled to an input of the logic block, and further having first and second outputs;
and
means for placing, during an initial cycle, a self-timed first data signal on the second output of the logic circuit onto a first output of the logic block, and for placing, during subsequent cycles, a self-timed second data signal on a selected one of the first or second outputs of the logic circuit onto the first output of the logic block,
wherein the means for placing is coupled to provide an output token with the second data signal during the initial cycle only when a first token is received indicating valid new data on the second output of the logic circuit and a second token is received indicating a valid new value on a select signal controlling selection of the selected one;
and
wherein the means for placing is coupled to provide the output token with the second data signal during the subsequent cycles only when either one of the following is true:
the first output of the logic circuit is the selected one, and tokens are received indicating valid new data on the first output of the logic circuit and on the select signal;
or
the second output of the logic circuit is the selected one, and tokens are received indicating valid new data on the first and second outputs of the logic circuit and on the select signal.

7 more elements

A programmable integrated circuit, comprising:

a plurality of logic blocks;
and
an interconnect structure coupled between the logic blocks,
wherein each of the logic blocks comprises:
a logic circuit having inputs coupled to the interconnect structure and further having first and second outputs;
a first multiplexer having first and second data inputs respectively coupled to the first and second outputs of the logic circuit, a select input coupled to receive a select signal, and a data output coupled to the interconnect structure;
and
control logic coupled to the first multiplexer, the control logic being programmably coupled, in one of a plurality of operating modes of the output multiplexer circuit, to place, during an initial cycle, a self-timed first data signal on the second output of the logic circuit onto the interconnect structure, and further programmably coupled, when operating in the one of the operating modes, to place, during subsequent cycles, a self-timed second data signal on a selected one of the first or second outputs of the logic circuit onto the interconnect structure.

5 more elements

A programmable integrated circuit, comprising:

an array of substantially similar programmable logic blocks;
and
an interconnect structure coupled between the programmable logic blocks,
wherein each of the programmable logic blocks comprises:
a logic circuit having inputs coupled to the interconnect structure and further having first and second outputs;
a programmable multiplexer having first and second data inputs respectively coupled to the first and second outputs of the logic circuit, a select input coupled to receive a select signal, and a data output coupled to the interconnect structure;
and
control logic coupled to the programmable multiplexer, the control logic being programmably coupled, in one of a plurality of operating modes of the output multiplexer circuit, to place, during an initial cycle, a self-timed first data signal on the second output of the logic circuit onto the interconnect structure, and further programmably coupled, when operating in the one of the operating modes, to place, during subsequent cycles, a self-timed second data signal on a selected one of the first or second outputs of the logic circuit onto the interconnect structure.

5 more elements

Dependencies are inferred from the claim text.