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US 7,746,096 B1Granted
Impedance buffer and method
AssigneeCypress Semiconductor Corporation
InventorDerek Yingqi Yang
Life of this patent
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Abstract
An impedance buffer has a single comparator with a first input and a second input. A first leg has a first pull-up array in series with a reference resistor. The first input of the single comparator is electrically coupled to a node between the first pull up array and the reference resistor. A second leg has a second pull-up array in series with a pull-down array. The second leg is coupled through a switch to the second input of the single comparator.
Claims9
A method of operating an impedance buffer comprising:
- a) comparing a first voltage at a first node between a first pull-up array and a reference resistor to a reference voltage to form a first difference output using a comparator;
- b) adjusting an impedance of the first pull-up array based on the first difference output;
- and
- c) comparing a second voltage at a second node between a second pull-up array and a pull-down array to the first voltage at the first node to form a second difference output using the comparator.
1 more element
Dependencies are inferred from the claim text.