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US 7,746,058 B2Granted
Sequential equivalent—time sampling with an asynchronous reference clock
AssigneeTektronix, Inc.
InventorsMichael A. Nelson, Pavel R. Zivny
Life of this patent
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Abstract
A sequential equivalent-time sampling oscilloscope simultaneously acquires samples of a signal-under-test and a reference clock that is asynchronous with the signal-under-test. The oscilloscope converts the samples of the reference clock into timestamps and uses the timestamps to compensate for the jitter of the oscilloscope and to indicate the absolute jitter of the signal-under-test.
Claims9
A sequential equivalent-time sampling oscilloscope comprising:
- a first input for receiving a signal-under-test;
- a second input for receiving a trigger signal, the trigger signal being synchronous with the signal-under-test;
- a third input for receiving a reference clock, the reference clock being asynchronous with the signal-under-test;
- circuitry for simultaneously acquiring samples of the signal-under-test and samples of the reference clock in response to the trigger signal;
- circuitry for calculating sampled phases from the samples of the reference clock;
- circuitry for unwrapping the sampled phases into a sampled phase ramp;
- circuitry for generating an ideal phase ramp from the sampled phase ramp;
- and circuitry for subtracting the sampled phase ramp from the ideal phase ramp in order to calculate timestamps from the samples of the reference clock.
5 more elements
A method of sequential equivalent-time sampling comprising:
- simultaneously acquiring samples of a signal-under-test and samples of a reference clock in response to a trigger signal, the trigger signal being synchronous with the signal-under-test, and the reference clock being asynchronous with the signal-under-test;
- calculating sampled phases from the samples of the reference clock;
- unwrapping the sampled phases into a sampled phase ramp;
- generating an ideal phase ramp from the sampled phase ramp;
- and
- subtracting the sampled phase ramp from the ideal phase ramp in order to calculate timestamps from the samples of the reference clock.
3 more elements
A sequential equivalent-time sampling oscilloscope comprising:
- means for receiving a signal-under-test;
- means for receiving a trigger signal, the trigger signal being synchronous with the signal-under-test;
- means for receiving a reference clock, the reference clock being asynchronous with the signal-under-test;
- means for simultaneously acquiring samples of the signal-under-test and samples of the reference clock in response to the trigger signal;
- means for calculating sampled phases from the samples of the reference clock;
- means for unwrapping the sampled phases into a sampled phase ramp;
- means for generating an ideal phase ramp from the sampled phase ramp;
- and
- means for subtracting the sampled phase ramp from the ideal phase ramp in order to calculate timestamps from the samples of the reference clock.
6 more elements
Dependencies are inferred from the claim text.