Hybrid metal fully silicided (FUSI) gate

A system comprising:

• a PMOS gate structure, the PMOS gate structure comprising:
• a first high-κ dielectric layer;
• a P-metal layer;
• a mid-gap metal layer, wherein the mid-gap metal layer is formed between the high-κ dielectric layer and the P-metal layer;
• and
• a fully silicided polysilicon layer formed on the P-metal layer;
• and
• an NMOS gate structure, the NMOS gate structure comprising:
• a second high-κ dielectric layer;
• the fully silicided polysilicon layer;
• and
• the mid-gap metal layer, wherein the mid-gap metal layer is formed between the high-κ dielectric and the fully silicided polysilicon layer.

A semiconductor device comprising:

• a high-κ layer of HfO2 on a substrate, wherein the substrate includes a PMOS region and an NMOS region;
• a TiN layer on the high-κ layer;
• a TaCNO layer on the TiN layer in the PMOS region of the substrate;
• a single phase fully silicided polysilicon gate stack region disposed on the TaCNO layer;
• a single phase fully silicided polysilicon gate stack on the TiN layer;
• and
• source/drain regions for both NMOS and PMOS transistors.