US 7,745,850 B2 · Nitride-based semiconductor device with reduced leakage current

Abstract

A high electron mobility transistor is disclosed which has a triple-layered main semiconductor region formed on a silicon substrate via a multilayered buffer region. The multilayered buffer region is in the form of alternations of an aluminum nitride layer and a gallium nitride layer. Whilst the aluminum nitride layers are of n-like conductivity, the gallium nitride layers are doped into p-type conductivity, with the consequent creation of pn junctions between the two kinds of buffer layers. Another pn junction is formed between one p-type gallium nitride layer and the adjoining n-like electron transit layer included in the main semiconductor region. The pn junctions serve for reduction of current leakage.

Claims13

Dependent claims

A nitride-based semiconductor device of reduced current leakage, the semiconductor device comprising:

(a) a substrate containing silicon;
(b) a buffer region of a nitride-based semiconductor on the substrate;
(c) a main semiconductor region having at least one nitride-based semiconductor layer on the buffer region, said main semiconductor region having a major surface;
(d) a first and a second main electrode formed in spaced-apart positions on, and in ohmic contact with, the major surface of the main semiconductor region;
and
(e) a control electrode formed between the first and the second main electrode on the major surface of the main semiconductor region for controlling current flow between the first and the second main electrode,
wherein the buffer region and/or the main semiconductor region are adapted to provide a pn junction for preventing current leakage there-through.

4 more elements

A nitride-based semiconductor device of reduced current leakage, the semiconductor device comprising:

(a) a substrate containing silicon;
(b) a buffer region on the substrate;
(c) a main semiconductor region having at least one nitride-based semiconductor layer on the buffer region, said main semiconductor region having a major surface;
(d) a first and second main electrode formed in spaced-apart positions on, and in ohmic contact with, the major surface of the main semiconductor region;
and
(e) a control electrode formed between the first and the second main electrode on the major surface of the main semiconductor region for controlling current flow between the first and the second main electrode,
wherein the buffer region comprises a substantially n-type nitride-based semiconductor region doped with a p-type impurity in at least part thereof.

4 more elements

Dependencies are inferred from the claim text.

Nitride-based semiconductor device with reduced leakage current

Life of this patent

Nitride-based semiconductor device with reduced leakage current

Life of this patent

Abstract

Claims13