US 7,745,847 B2 · Metal oxide semiconductor transistor

Abstract

The present invention provides a method for fabricating a metal oxide semiconductor transistor. First, a semiconductor substrate is provided and at least a gate is formed on the semiconductor substrate. A protective layer is then formed on the semiconductor substrate and the gate. Subsequently, at least a recess is formed in the semiconductor substrate adjacent to the gate, and then an epitaxial layer is formed in the recess. A lightly doped region is formed in the semiconductor substrate adjacent to the gate. Finally, a spacer is formed on the sidewall of the gate.

Claims11

Dependent claims

A MOS transistor structure, comprising:

a gate formed on a semiconductor substrate;
two raised epitaxial layers positioned respectively in the semiconductor substrate next to the relative sides of the gate and above the surface of the semiconductor substrate;
a spacer formed on the sidewall of the gate and extending laterally upon a portion of the raised epitaxial layers, and a contact surface of the raised epitaxial layers and a bottom of the spacer is above the surface of the semiconductor substrate;
and
two doped region formed respectively in the semiconductor substrate next to the relative sides of the gate.

2 more elements

Dependencies are inferred from the claim text.

Facts

Application

11/836,772Filed 9 Aug 2007

Published

US 2009/0039389 A112 Feb 2009

Granted

29 Jun 2010

Term ends

Not estimatedThe source records don’t support an estimate.

Classification10 codes

H10D 84/017
The components including complementary IGFETs, e.g. CMOS devices: manufacturing their source or drain regions, e.g. silicided source or drain regions
H10D 30/0275
Of lateral single-gate IGFETs: forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised…
H10D 30/797
Arrangements for exerting mechanical stress on the crystal lattice of the channel regions: being in source or drain regions, e.g. SiGe source or drain
H10D 62/021
Manufacture or treatment: forming source or drain recesses by etching e.g. recessing by etching and then refilling

Metal oxide semiconductor transistor

Life of this patent

Metal oxide semiconductor transistor

Life of this patent

Abstract

Claims11