US 7,745,319 B2 · System and method for fabricating a fin field effect transistor

Abstract

There is provided a system and method for fabricating a fin field effect transistor. More specifically, in one embodiment, there is provided a method comprising depositing a layer of nitride on a substrate, applying a photolithographic mask on the layer of nitride to define a location of a wall, etching the layer of nitride to create the wall, removing the photolithographic mask, depositing a spacer layer adjacent to the wall, etching the spacer layer to create a spacer adjacent to the wall, wherein the spacer and the wall cover a first portion of the substrate, and etching a second portion of the substrate not covered by the spacer to create a trench.

Claims15

Dependent claims

A method comprising:

depositing a layer of nitride on a substrate;
disposing a photolithographic mask on the layer of nitride, to define a location of a wall;
etching the layer of nitride to create the wall;
removing the photolithographic mask;
depositing a spacer layer adjacent to the wall;
etching the spacer layer to create a spacer adjacent to the wall, wherein the spacer and the wall cover a first portion of the substrate;
etching a second portion of the substrate not covered by the spacer to create a trench;
filing the trench with a dielectric material;
etching the layer of nitride to expose a part of the first portion of the substrate;
and
etching the exposed part of the first portion of the substrate to a depth to create a channel.

8 more elements

Dependencies are inferred from the claim text.

Facts

Application

11/508,047Filed 22 Aug 2006

Published

US 2008/0050885 A128 Feb 2008

Granted

29 Jun 2010

Term ends

Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10D 30/62
Insulated-gate field-effect transistors [IGFET]: fin field-effect transistors [FinFET]
H10D 30/024
Of FETs having insulated gates [IGFET]: of fin field-effect transistors [FinFET]
H10D 30/6211
Fin field-effect transistors [FinFET]: having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates
H10D 62/115
Isolations within a component, i.e. internal isolations: dielectric isolations, e.g. air gaps

System and method for fabricating a fin field effect transistor

Life of this patent

System and method for fabricating a fin field effect transistor

Life of this patent

Abstract

Claims15