Methods of forming semiconductor devices

A method of providing an array of memory cells, the method comprising:

• forming a body of a first conductivity type in a semiconductor substrate;
• forming a first insulator layer adjacent to the substrate;
• forming a plurality of charge storage regions adjacent to the first insulator layer and arranged in an array of columns extending in a first direction and rows in a second direction generally perpendicular to the first direction;
• forming a plurality of first regions of a second conductivity type;
• forming a plurality of second regions of the second conductivity type;
• forming a plurality of channel regions in the body each extending between one of the first regions and one of the second regions, and generally disposed adjacent to and insulated from one of the charge storage regions;
• forming a second insulator layer adjacent to each of the charge storage regions;
• forming a plurality of first electrically conductive regions each comprising at least a portion thereof disposed adjacent to and insulated from one of the charge storage regions by the second insulator layer;
• forming a plurality of filters comprising a filtering function each comprising at least a portion disposed adjacent to one of the first electrically conductive regions;
• forming a plurality of second electrically conductive regions each comprising charge carriers with an energy distribution and each disposed adjacent to and insulated from at least a portion of one of the first electrically conductive regions by one of the filters;
• and
• forming a plurality of parallel spaced apart bit-lines extending in the first direction with at least one of the bit-lines electrically connected to at least one of the second regions,
• wherein each of the first electrically conductive regions overlaps with one of the second electrically conductive regions at an overlap surface, and wherein lines perpendicular to the overlap surfaces intersect at least part of corresponding ones of the charge storage regions.

A method of providing a memory cell, the method comprising:

• providing a semiconductor substrate including a body of a first conductivity type, first and second regions of a second conductivity type and a channel between the first and second regions;
• arranging a first insulator layer adjacent to the channel;
• arranging a charge storage region adjacent to the first insulator layer;
• arranging a second insulator layer adjacent to the charge storage region;
• arranging a first conductive region adjacent to the second insulator layer;
• arranging a filter adjacent to the first conductive region;
• and
• arranging a second conductive region adjacent to the filter,
• wherein the second conductive region overlaps the first conductive region at an overlap surface, and
• wherein a line perpendicular to the overlap surface intersects at least a portion of the charge storage region.