US 7,745,239 B1 · Arrangement of fill unit elements in an integrated circuit interconnect layer

Abstract

An integrated circuit having a metal interconnect layer, and also having a conductive line and a boundary defined with a uniform distance from the conductive line that defines a “keep out” distance between the boundary and the conductive line. A set of first fill elements are uniformly arranged along the boundary outside of the “keep out” distance, and a set of second fill elements further from the conductive line than the first fill elements are arranged in a pattern that would be uniform, but for having some fill elements missing from the pattern.

Claims6

Dependent claims

A method of producing an integrated circuit having a metal interconnect layer that includes an interconnect line, to meet a set of design criteria, said method comprising:

(a) defining a “keep out” distance;
(b) linearly orienting fill elements along a line that is said “keep out” distance from said interconnect line so as to generate a uniform line of fill elements, the uniform line of fill elements defining a prospective first fill pattern;
and
(c) adding a second prospective fill pattern, more displaced from said interconnect line than said first fill pattern and changing said prospective first fill pattern only if said set of design criteria cannot be met by modifying said second prospective fill pattern.

1 more element

Dependencies are inferred from the claim text.

Arrangement of fill unit elements in an integrated circuit interconnect layer

Life of this patent

Arrangement of fill unit elements in an integrated circuit interconnect layer

Life of this patent

Abstract

Claims6