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US 7,741,715 B2Granted
Crack stop and moisture barrier
AssigneeInfineon Technologies AG
InventorsSun-Oo Kim, O Seo Park
Life of this patent
Estimating the term…
Abstract
A design for a crack stop and moisture barrier for a semiconductor device includes a plurality of discrete conductive features formed at the edge of an integrated circuit proximate a scribe line. The discrete conductive features may comprise a plurality of staggered lines, a plurality of horseshoe-shaped lines, or a combination of both.
Claims18
A semiconductor device, comprising:
- an integrated circuit, the integrated circuit having a peripheral region proximate an edge of the integrated circuit;
- and
- a barrier structure forming an integrated moisture barrier and crack stop, disposed on the peripheral region of the integrated circuit, the barrier structure comprising a plurality of discrete conductive features, wherein a length of the discrete conductive features is larger than a width or a height of the discrete conductive features, wherein the discrete conductive features of the barrier structure are arranged along the length in a plurality of parallel rows in a plane disposed parallel to a top surface of the semiconductor device, wherein the discrete conductive features are discrete along the length, and wherein the discrete conductive features in adjacent parallel rows are staggered.
A semiconductor device, comprising:
- an integrated circuit, the integrated circuit having a peripheral region proximate an edge of the integrated circuit;
- and
- a barrier structure disposed on the peripheral region of the integrated circuit, the barrier structure comprising a plurality of discrete conductive features, wherein a length of the discrete conductive features is larger than a width or a height of the discrete conductive features, wherein the discrete conductive features of the barrier structure are arranged along the length in a plurality of parallel rows in a plane disposed parallel to a top surface of the semiconductor device, wherein all conductive features within the barrier structure in the plane parallel to the top surface of the semiconductor device comprise a discrete conductive feature of the plurality of discrete conductive features, and wherein the discrete conductive features in adjacent parallel rows are staggered.
A semiconductor device, comprising:
- an integrated circuit, the integrated circuit having a peripheral region proximate an edge of the integrated circuit;
- and
- a barrier structure forming an integrated moisture barrier and crack stop, disposed on the peripheral region of the integrated circuit, the barrier structure comprising a plurality of discrete conductive features, wherein a length of the discrete conductive features is larger than a width or a height of the discrete conductive features, wherein the discrete conductive features of the barrier structure are arranged along the length in a plurality of parallel rows in a plane disposed parallel to a top surface of the semiconductor device, wherein the discrete conductive features are discrete along the length, wherein the discrete conductive features in adjacent parallel rows are staggered, wherein the plurality of discrete conductive features is the only barrier structure between the integrated circuit and the edge of the integrated circuit, and wherein all conductive features within the barrier structure in the plane parallel to the top surface of the semiconductor device comprise a discrete conductive feature of the plurality of discrete conductive features.
Dependencies are inferred from the claim text.