Correction method and correction system for design data or mask data, validation method and validation system for design data or mask data, yield estimation method for semiconductor integrated circuit, method for improving design rule, mask production method, and semiconductor integrated circuit production method

A validation method for design data or mask data for carrying out validation as to whether the design data or the mask data includes a critical pattern, which becomes critical on process proximity effect correction, in a microfabrication process for carrying out process proximity effect correction at least including etching proximity effect correction with respect to design (layout) data or data of a lithography mask, said validation being performed before and after the process proximity effect correction,

• the method comprising the steps of:
• (i) a first measurement step for exposing a resist using an evaluation mask including plural patterns varied in parameter value, a part of which is a critical pattern which becomes critical when the design data or the mask data is subjected to process proximity effect correction, developing the resist exposed, and measuring a pattern size of the resist developed;
• (ii) a second measurement step for etching a circuit material using the resist having been developed, and measuring a pattern size of the circuit material after the etching;
• (iii) determining parameter numerical condition for preventing the pattern data from being critical when the design data or the mask data is subjected to process proximity effect correction, based on the pattern size of the resist and the circuit material measured in the first and second measurement steps;
• and
• (iv) extracting a pattern with a parameter not satisfying the foregoing numerical condition from the design data or the mask data as a critical pattern which becomes critical on process proximity effect correction.

A system for correcting design data or mask data for correcting design (layout) data or lithography mask data so that a resulting lithography mask forms a desired size of circuit pattern through a microfabrication process, the system comprising:

• a proximity effect correction section for carrying out proximity effect correction with respect to the design data or the lithography mask data;
• an exposure device for exposing a resist using a evaluation mask and developing the resist exposed;
• a first measurement device for measuring a pattern size of the resist developed;
• a second measurement device for measuring a pattern size of a circuit material having been etched using the resist developed;
• a parameter numerical condition determining section for determining parameter numerical condition based on the pattern sizes of the resist and the circuit material measured by the first and second measurement devices so as to prevent the design data or the mask data from being critical on process proximity effect correction;
• a critical pattern extraction section for extracting a pattern with a parameter not satisfying the foregoing numerical condition from the design data or the lithography mask data as a critical pattern which becomes critical on process proximity effect correction;
• and
• a critical pattern correction section for correcting the design data or the mask data so that the critical pattern extracted have a parameter satisfying the foregoing numerical condition,
• wherein the evaluation mask is created in advance according to an evaluation mask including plural patterns varied in parameter value, a part of which is a critical pattern which becomes critical on process proximity effect correction.

A validation system for design data or mask data, for carrying out validation as to whether design (layout) data or lithography mask data includes a critical pattern which becomes critical on process proximity effect correction, in a microfabrication process including a proximity effect correction step for carrying out process proximity effect correction with respect to the design data or the lithography mask data at least including etching proximity effect correction, the validation being carried out before or after the proximity effect correction step,

• the system comprising:
• a proximity effect correction section for carrying out proximity effect correction with respect to the design data or the lithography mask data;
• an exposure device for exposing a resist using a evaluation mask and developing the resist exposed;
• a first measurement device for measuring a pattern size of the resist developed;
• a second measurement device for measuring a pattern size of a circuit material having been etched using the resist developed;
• a parameter numerical condition determining section for determining parameter numerical condition based on the pattern sizes of the resist and the circuit material measured by the first and second measurement devices so as to prevent the design data or the mask data from being critical on process proximity effect correction;
• and
• a critical pattern extraction section for extracting a pattern with a parameter not satisfying the foregoing numerical condition from the design data or the lithography mask data as a critical pattern which becomes critical on process proximity effect correction,
• wherein the evaluation mask is created in advance according to evaluation mask pattern data including plural patterns varied in parameter value, a part of which is a critical pattern which becomes critical on process proximity effect correction.

A correction method for design data or mask data comprising the steps of:

• (i) a first measurement step for carrying out an exposure experiment for exposing and developing a resist using an evaluation mask, and measuring a shape of the resist developed;
• (ii) a second measurement step for etching a circuit material using the resist developed and measuring a pattern size of the circuit material after the etching;
• (iii) a first estimation step for estimating a shape of the resist developed according to data of the evaluation mask by a calculation formula or by simulation;
• (iv) a second estimation step for estimating a shape of the circuit material etched according to data of the evaluation mask by a calculation formula or by simulation;
• (v) an fitting step for changing a parameter of the calculation formula or a parameter for the simulation based on comparison between the shapes of the resist and the circuit material measured by the first and second measurement steps and the shapes of the resist and the circuit material calculated in the first and second estimation steps so as to fit the calculation formula or the simulation to measurement results of the first and second measurement steps;
• and
• (vi) a proximity effect correction step for carrying out another estimation of a shape of the resist and a shape of the circuit material according to the calculation formula or the simulation having been modified in the step (v) and carrying out process proximity effect correction of the design (layout) data or the mask data based on the shape of the resist and the shape of the circuit material estimated in said another estimation,
• wherein the evaluation mask includes a pattern which is assumed to be critical on the process proximity effect correction based on the shape of the resist and the shape of the circuit material having been estimated in the steps (iii) and (iv).