Methods for fabricating dual bit flash memory devices

A method for fabricating a dual bit memory device, the method comprising:

• forming a charge trapping layer overlying a substrate;
• etching an isolation opening through the charge trapping layer;
• forming an oxide layer overlying the charge trapping layer and within the isolation opening, wherein the oxide layer within the isolation opening forms an isolation region;
• fabricating a control gate overlying the isolation opening and portions of the charge trapping layer adjacent to the isolation opening;
• etching the oxide layer and the charge trapping layer using the control gate as an etch mask, wherein the portions of the charge trapping layer comprise a first and second storage element of a dual bit memory device, wherein the isolation region separates the first and second storage elements;
• and
• implanting impurity dopants into the substrate using the control gate as an implantation mask to form an impurity doped bitline region within the substrate.