Signal routing on redistribution layer
AssigneeQimonda AG
InventorKlaus Hummler
Life of this patent
Estimating the term…
Abstract
A method of routing signals within a semiconductor memory device includes providing a semiconductor wafer having a top surface with a center portion, an edge portion and wafer bond pads at the center portion. A redistribution layer is provided on the top surface of the semiconductor wafer. The method includes redistributing signals from the wafer bond pads to redistribution edge pads utilizing the redistribution layer, and routing signals from the semiconductor wafer up to the redistribution layer and routing these signals back down to the semiconductor wafer.
Claims19
A method of routing electrical signals within a semiconductor memory device, the method comprising:
- providing a semiconductor wafer having a top surface with a center portion, an edge portion and wafer bond pads at the center portion;
- fabricating a redistribution layer on the top surface of the semiconductor wafer using fabrication tools;
- redistributing electrical signals from the wafer bond pads to redistribution edge pads utilizing the redistribution layer;
- and
- routing the electrical signals from the semiconductor wafer up to the redistribution layer and routing these electrical signals back down to the semiconductor wafer.
A method of manufacturing a semiconductor memory device, the method comprising:
- forming a dielectric layer;
- forming a metal last layer over the dielectric layer using fabrication tools, wherein the metal last layer having first and second locations spaced apart from each other;
- forming a passivation layer over the metal last layer;
- forming a redistribution layer over the passivation layer;
- and
- forming a signal routing wire within the redistribution layer, wherein the signal routing wire is coupled to both the first location and the second location of the metal last layer.
A method of routing electrical signals within a semiconductor device comprising:
- providing a dielectric layer;
- fabricating a metal last layer over the dielectric layer using fabrication tools, wherein the metal last layer having first and second locations spaced apart from each other;
- providing a passivation layer over the metal last layer;
- providing a redistribution layer over the passivation layer;
- providing a signal routing wire within the redistribution layer;
- and
- coupling the signal routing wire to both the first location and the second location of the metal last layer such that electrical signals are routed from the first and second locations of the metal last layer up to the redistribution layer via the signal routing wire.
A method of operating a multi-layer semiconductor wafer comprising:
- fabricating a metal last layer using fabrication tools;
- routing electrical signals from the metal last layer up through a passivation layer to a redistribution layer, the redistribution layer including bond pads;
- and
- routing the electrical signals back down from the redistribution layer through the passivation layer and back to the metal last layer.
Dependencies are inferred from the claim text.