Automatic time warp for electronic system simulation
AssigneeCPU Technology, Inc.
InventorsEdward C. King, Alan G. Smith, Jeffrey S. Hammond, Richard S. Czyzewski
Life of this patent
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Abstract
A simulation of an electronics system which performs a set of operations of interest. A simulated supervisory circuit detects a state in which all the operations have been completed, and also determines the amount of time until the occurrence of the next relevant event. Simulation time is then advanced by that amount of time. This enables simulation time corresponding to an inactive system to be eliminated.
Claims16
A computer-implemented method for efficiently simulating an electronic system, comprising:
- using a computer to perform steps including:
- determining a state of said simulated electronic system;
- determining the occurrence of a next relevant system event in said simulated electronic system when said simulated electronic system state is determined to be idle;
- advancing a simulation time to immediately prior to said occurrence of said next relevant system event;
- calculating a state of said simulated electronic system at said advanced simulation time so that said state of said simulated electronic system is advanced;
- and
- further advancing said simulated electronic system by single simulated clock periods until a predetermined wait time has elapsed regardless of whether the simulated electronic system state is idle
- whereby actual time for simulating said electronic system by said computer is reduced.
A computer readable storage medium on which are recorded executable computer code which when executed cause a processor to perform the steps comprising:
- determining a state of a simulated electronic system;
- determining the occurrence of a next relevant system event in said simulated electronic system when said simulated electronic system is determined to be idle;
- advancing a simulation time immediately prior to said occurrence of said next relevant system event;
- calculating a state of said simulated electronic system at said advanced simulation time so that said state of said simulated electronic system is advanced whereby actual time for simulating said electronic system is reduced;
- and
- further advancing said simulated electronic system by single simulated clock periods until a predetermined wait time has elapsed regardless of whether the simulated electronic system state is idle;
- whereby actual time for simulating said electronic system is reduced.
Dependencies are inferred from the claim text.