Transistor assembly and method for manufacturing same
AssigneeInfineon Technologies AG
InventorJakob Huber
Life of this patent
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Abstract
A transistor assembly having a transistor includes a plurality of transistor regions, each of which has a vertical transistor structure having a collector semiconductor region, a base semiconductor region and an emitter semiconductor region, emitter contacting regions arranged above the transistor regions and base contacting regions connected to the base semiconductor regions via a polycrystalline semiconductor layer, wherein the polycrystalline semiconductor layer is structured such that the base contacting regions of transistor regions which are not part of the transistor are electrically isolated from base contacting regions of transistor regions which are part of the transistor.
Claims12
A transistor assembly having a transistor, comprising:
- a plurality of transistor regions including a first set and a second set, each transistor region comprising a vertical transistor structure comprising a collector semiconductor region, a base semiconductor region and an emitter semiconductor region;
- emitter contacting regions arranged above the transistor regions;
- base contacting regions connected to the base semiconductor regions via a polycrystalline semiconductor layer;
- and
- wherein the polycrystalline semiconductor layer is structured such that base contacting regions of the first set of transistor regions which are not part of the transistor are electrically isolated from base contacting regions of the second set of transistor regions which are part of the transistor,
- wherein the polycrystalline semiconductor layer is further structured such that the base semiconductor regions of the second set of transistor regions are not connected to one another via the polycrystalline layer in an electrically conducting way.
A transistor assembly having a transistor, comprising:
- a plurality of transistor regions including a first set and a second set, each transistor region comprising a vertical transistor structure comprising a collector semiconductor regions, a base semiconductor region and an emitter semiconductor region:
- emitter containing regions arranged above the transistor regions;
- based contacting regions connected to the base semiconductor regions via a polycrystalline semiconductor layer;
- and
- wherein the polycrystalline semiconductor layer is structured such that base contacting regions of the first set of transistor regions which are not part of the transistor are electrically isolated from base contacting regions of the second set of transistor regions which are part of the transistor,
- wherein the polycrystalline semiconductor layer comprises recesses between the base semiconductor regions such that the base semiconductor regions of the second set of transistor regions are not connected via the polycrystalline semiconductor layer in a conducting way, wherein the recesses define interdigitating regions of portions of the polycrystalline semiconductor layer.
A method for manufacturing a transistor assembly having a transistor, comprising:
- providing a plurality of transistor regions, each of which comprises a vertical transistor structure comprising a collector semiconductor region, a base semiconductor region and an emitter semiconductor region, emitter contacting regions arranged above the transistor regions, base contacting regions connected to the base semiconductor regions via a polycrystalline semiconductor layer,
- structuring the polycrystalline semiconductor layer such that the base contacting regions of a first set of transistor regions which are not part of the transistor are electrically isolated from base contacting regions of a second set of transistor regions which are part of the transistor;
- and
- depositing and structuring a metallization layer to generate a base metallization connecting the base contact regions of the transistor in an electrically conducting way,
- wherein the step of structuring the polycrystalline semiconductor layer includes electrically isolating base contacting regions from the first set of transistor regions, the first set of transistor regions being a quantity of transistor regions of the plurality of transistor regions in excess of a quantity of transistor regions required to obtain a set of predetermined electrical features of the transistor.
Dependencies are inferred from the claim text.