Method of manufacturing semiconductor device and semiconductor device
AssigneeKabushiki Kaisha Toshiba
InventorMasakatsu Tsuchiaki
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Abstract
Disclosed is a semiconductor device of n-type MOSFET structure, which comprises a semiconductor substrate having a device isolation region, diffusion regions formed in the semiconductor substrate, gate electrodes formed above the semiconductor substrate, and a F-containing NiSi layer formed on the diffusion regions and containing F atoms at a concentration of 3.0×1013 cm−2 or more in areal density, wherein a depth from the junction position formed between the diffusion region and the semiconductor substrate to the bottom of the F-containing NiSi layer is confined within the range of 20 to 100 nm, and the concentration of F atoms at an interface between the F-containing NiSi layer and the semiconductor substrate is 8.0×1018 cm−3 or more.
Claims18
A semiconductor device including an n-type MOSFET structure comprising:
- a silicon substrate having a device isolation region;
- diffusion regions formed in the silicon substrate;
- gate electrodes formed above the silicon substrate;
- and
- a NiSi region containing F without incorporation of dopant impurities and disposed on the gate electrode;
- and
- a F-containing NiSi layer formed on the diffusion regions and containing F atoms at a concentration of 3.0×1013 cm−2 or more in areal density, a depth from the junction position formed between the diffusion region and the silicon substrate to the bottom of the F-containing NiSi layer being in the range of 20 to 100 nm;
- and the concentration of F atoms at an interface between the F-containing NiSi layer and the silicon substrate being 8.0×1018 cm−3 or more.
Dependencies are inferred from the claim text.