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US 7,622,373 B2Granted
Memory device having implanted oxide to block electron drift, and method of manufacturing the same
AssigneeSpansion LLC
InventorsWei Zheng, Chungho Lee
Life of this patent
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Abstract
A memory device includes a substrate, a first gate stack overlying the substrate, a second gate stack overlying the substrate and spaced apart from the first gate stack, an oxide region formed at a first depth within the substrate and between the first and second gate stacks, and an impurity doped region formed at a second depth within the substrate and between the first and second gate stacks, the first depth being lower than the second depth.
Claims18
A method for fabricating a dual-bit memory device comprising a first dual-bit memory cell and a second dual-bit memory cell, the method comprising the steps of:
- forming a first gate stack of the first dual-bit memory cell and a second gate stack of the second dual-bit memory cell overlying a substrate, wherein the first gate stack and the second gate stack are each designed to store at least two bits of information;
- forming an oxide region at a first depth within the substrate and between the first and second gate stacks, wherein the oxide region is formed in a region within the substrate that underlies both the first and second gate stacks and that is shared by the first and second gate stack;
- forming an impurity doped region at a second depth within the substrate and between the first and second gate stacks to produce a shared bit line that is shared by both of the first and second gate stacks, and wherein the impurity doped region extends to and directly contacts the oxide region to prevent electrons from migrating between the first and second gate stacks, and wherein the first depth is lower than the second depth.
A dual-bit memory device, comprising:
- a substrate;
- a first dual-bit memory cell comprising a first gate stack overlying the substrate;
- a second dual-bit memory cell comprising a second gate stack overlying the substrate and spaced apart from the first gate stack, wherein the first gate stack and the second gate stack are each designed to store at least two bits of information;
- an oxide region formed at a first depth within the substrate and between the first and second gate stacks, wherein the oxide region is formed in a region within substrate that underlies both the first and second gate stacks and that is shared by the first and second gate stack;
- a shared bit line formed at a second depth within the substrate and between the first and second gate stacks, wherein the shared bit line extends to and directly contacts the oxide region to prevent electrons from migrating between the first and second gate stacks, and wherein the first depth is lower than the second depth.
2 more elements
A method for fabricating a dual-bit memory device, the method comprising the steps of:
- providing a structure comprising:
- a substrate having a first dual-bit memory cell comprising a first gate stack overlying the substrate and a second dual-bit memory cell comprising a second gate stack overlying the substrate, and an oxide region at a first depth within the substrate and between the first and second gate stacks, wherein the oxide region is formed in a region within the substrate that underlies both the first and second gate stacks and that is shared by the first and second gate stacks, wherein the first gate stack and the second gate stack are each designed to store at least two bits of information;
- and
- blocking an electron migration path in the substrate by forming a shared bit line in the substrate that extends to and directly contacts the oxide region to prevent electrons from migrating between the first and second gate stacks, wherein the shared bit line is formed within the substrate between the first and second gate stacks and is shared by both of the first and second gate stacks, wherein the shared bit line is formed at a second depth within the substrate, wherein the first depth is lower than the second depth, and the shared bit line is formed directly above the oxide region such that the oxide region and the shared bit line are adjacent within the substrate.
1 more element
Dependencies are inferred from the claim text.