Comparators in IC with programmably controlled positive / negative hysteresis level and open-drain / push-pull output coupled to crossbar switch or rising / falling edge interrupt generation

An integrated circuit package, comprising:

• a processing core for operating on a set of instructions to carry out predefined processes;
• a plurality of comparators for performing compare operations within the integrated circuit package;
• at least one control register associated with each of the plurality of comparators for storing a first group of control bits controlling an amount of positive hysteresis of each of the plurality of comparators and a second group of control bits controlling an amount of negative hysteresis of each of the plurality of comparators;
• and
• wherein each of the plurality of comparators are software programmable to control a hysteresis of the plurality of comparators responsive to control bits established in the at least one control register of the comparator by the processing core, the amount of positive hysteresis programmed via the first group of the control bits in the at least one control register and the amount of negative hysteresis programmed via the second group of the control bits in the at least one control register;
• wherein each of the plurality of comparators may be software programmed to generate an interrupt on a rising clock edge responsive to a first control bit, a falling clock responsive to a second control bit, and both a rising and falling clock edge responsive to the first and the second control bits;
• and
• wherein each of the plurality of comparators can be enabled or disabled by the processing core responsive to a software programmed bit in the control register.

An integrated circuit package on a single chip, comprising:

• a processing core for operating on a set of instructions to carry out predefined processes;
• a plurality of comparators for performing compare operations within the integrated circuit package;
• at least one control register associated with each of the plurality of comparators for storing a first group of control bits controlling an amount of positive hysteresis of each of the plurality of comparators and a second group of control bits controlling an amount of negative hysteresis of comparators;
• wherein each of the plurality of comparators are software programmable to control an amount of hysteresis voltage of each of the plurality of comparators and to control a positive going and negative going symmetry of hysteresis around the amount of hysteresis voltage;
• a crossbar switch for assigning an output of the plurality of comparators to package pins;
• and
• wherein when a comparator output is assigned to the package pins, the comparator output can be programmed by the processing core to operate in either an open drain mode or a push-pull mode.