Multiprocessor system and method ensuring coherency between a main memory and a cache memory
AssigneeHitachi, Ltd.
InventorMasahiro Tokoro
Life of this patent
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AssigneeHitachi, Ltd.
InventorMasahiro Tokoro
Estimating the term…
A directory of each node in a shared memory multiprocessor is made up of directory entries each including one or more directory bits indicating whether the cache memory of another node stores a copy of a part of a memory region group of the main memory of one node. The memory region group includes memory regions having the same memory address portion including a cache index portion. Each node is assigned one of the directory bits. When accessing the main memory, the node checks whether the directory bits of the directory entry corresponding to a memory region to be accessed are set to a predetermined value, and if one or more of the directory bits of the directory entry are set to the predetermined value, an access address is multicast or broadcast to other nodes to perform coherency control.
A multiprocessor having a shared main memory, which includes a plurality of nodes connected to one another, each node comprising:
A microprocessor having a shared main memory, which includes a plurality of N nodes connected to one another, each node comprising:
A multiprocessor of a type having a shared main memory, which includes N nodes connected to one another (where N is an integer larger than 1), said N nodes forming M node groups including N/M nodes (where M is an integer larger than 1), each node comprising:
A method for performing internode cache coherency control in a multiprocessor system which includes a plurality of nodes connected to one another, each node comprising:
Dependencies are inferred from the claim text.