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US 7,613,863 B2Granted
High-speed data readable information processing device
AssigneeRenesas Technology Corp.
InventorsHideo Inoue, Isao Minematsu, Takahiro Ikenobe
Life of this patent
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Abstract
A CAN module receives a message from a CAN bus to store the same in a message box unit of a message box. A reception request signal is output from the message box unit to a DMAC/IF. The DMAC/IF outputs a 7-bit encoded address together with a transfer request signal. A DMAC accesses a selected message box unit of the CAN module and a memory based on the transfer request signal and the 7-bit encoded address to transfer the message stored in the selected message box unit to the memory.
Claims4
A data processing system comprising:
- a central processing unit;
- a data transfer control unit including an exclusive access control flag;
- a network interface unit;
- and
- a data transfer control unit interface coupled between the data transfer control unit and the network interface unit,
- wherein the network interface unit receives data from a network outside of the data processing system, and issues a data transfer request to the data transfer control unit via the data transfer control unit interface,
- wherein the data transfer control unit interface sets the exclusive access control flag in accordance with the request of the network interface unit,
- wherein the data transfer control unit transfer data received by the network interface unit to a memory, and
- wherein the central processing unit decides whether to be access or not to be access to the data in the memory based on the exclusive access control flag.
6 more elements
Dependencies are inferred from the claim text.