System and method for parallel PN generation

A method for generating a pseudo-random noise (PN) code, comprising the steps of:

• programming one or more inputs on each of L programmable PN generators to enable the L programmable PN generators to each produce a PN code;
• configuring each of the L programmable PN generators to output every Lth chip of the PN code;
• slipping the high rate PN code for a predetermined number of chips equal to a multiple of L by repeating a previous output of each of the L programmable PN generators for a MOD L quotient of the predetermined number of chips;
• slipping the high rate PN code for a predetermined number of chips less than L by enabling the output of select PN generators of the L PN generators to be advanced by a predetermined number of chips less than L;
• and
• multiplexing the outputs of each of the L programmable PN generators together to produce a PN code having a chip rate substantially equal to a sum of the chip rates of the L programmable PN generators.

A method for generating a pseudo-random noise (PN) code, comprising the steps of:

• configuring L programmable PN generators to output a chip every Lth chip of a PN code;
• enabling the output of each of the L PN generators to freeze for a coarse slip;
• and
• enabling the output of selected PN generators of the L PN generators to be advanced by a predetermined number of chips less than L for a fine slip.

A parallel pseudo-random noise (PN) generator system for generating a PN code sequence, comprising:

• L PN generators, wherein each PN generator comprises a plurality of shift registers configured to each produce a PN-code sequence;
• a variable means for advancing select shift registers of the plurality of shift registers between 0 and L chips;
• an early epoch detection means;
• and
• a multiplexer configured to multiplex the PN code sequence of each of the L PN generators to produce a PN code sequence having a chip rate a plurality times faster than a chip rate of each of the L PN generators.